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1.1 leitner 1: /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
1.2 leitner 2: Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3: 2002, 2003, 2004, 2005, 2006, 2009 Free Software Foundation, Inc.
1.1 leitner 4:
5: This file is part of the GNU C Library.
6:
7: The GNU C Library is free software; you can redistribute it and/or
8: modify it under the terms of the GNU Lesser General Public
9: License as published by the Free Software Foundation; either
10: version 2.1 of the License, or (at your option) any later version.
11:
12: The GNU C Library is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15: Lesser General Public License for more details.
16:
17: You should have received a copy of the GNU Lesser General Public
18: License along with the GNU C Library; if not, write to the Free
19: Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20: 02111-1307 USA. */
21:
22: /* You have to define the following before including this file:
23:
24: UWtype -- An unsigned type, default type for operations (typically a "word")
25: UHWtype -- An unsigned type, at least half the size of UWtype.
26: UDWtype -- An unsigned type, at least twice as large a UWtype
27: W_TYPE_SIZE -- size in bits of UWtype
28:
29: UQItype -- Unsigned 8 bit type.
30: SItype, USItype -- Signed and unsigned 32 bit types.
31: DItype, UDItype -- Signed and unsigned 64 bit types.
32:
33: On a 32 bit machine UWtype should typically be USItype;
1.2 leitner 34: on a 64 bit machine, UWtype should typically be UDItype. */
1.1 leitner 35:
36: #define __BITS4 (W_TYPE_SIZE / 4)
37: #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
38: #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
39: #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
40:
41: #ifndef W_TYPE_SIZE
42: #define W_TYPE_SIZE 32
43: #define UWtype USItype
44: #define UHWtype USItype
45: #define UDWtype UDItype
46: #endif
47:
1.3 ! leitner 48: extern const UQItype __clz_tab[256] __attribute__ ((visibility ("hidden")));
1.2 leitner 49:
1.1 leitner 50: /* Define auxiliary asm macros.
51:
1.2 leitner 52: 1) umul_ppmm(high_prod, low_prod, multiplier, multiplicand) multiplies two
53: UWtype integers MULTIPLIER and MULTIPLICAND, and generates a two UWtype
1.1 leitner 54: word product in HIGH_PROD and LOW_PROD.
55:
56: 2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
57: UDWtype product. This is just a variant of umul_ppmm.
58:
59: 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
60: denominator) divides a UDWtype, composed by the UWtype integers
61: HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
62: in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less
63: than DENOMINATOR for correct operation. If, in addition, the most
64: significant bit of DENOMINATOR must be 1, then the pre-processor symbol
65: UDIV_NEEDS_NORMALIZATION is defined to 1.
66:
67: 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
68: denominator). Like udiv_qrnnd but the numbers are signed. The quotient
69: is rounded towards 0.
70:
71: 5) count_leading_zeros(count, x) counts the number of zero-bits from the
72: msb to the first nonzero bit in the UWtype X. This is the number of
73: steps X needs to be shifted left to set the msb. Undefined for X == 0,
74: unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
75:
76: 6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
77: from the least significant end.
78:
79: 7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
80: high_addend_2, low_addend_2) adds two UWtype integers, composed by
81: HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
82: respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
83: (i.e. carry out) is not stored anywhere, and is lost.
84:
85: 8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
86: high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
87: composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
88: LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE
89: and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
90: and is lost.
91:
92: If any of these macros are left undefined for a particular CPU,
93: C macros are used. */
94:
95: /* The CPUs come in alphabetical order below.
96:
97: Please add support for more CPUs here, or improve the current support
98: for the CPUs below!
99: (E.g. WE32100, IBM360.) */
100:
101: #if defined (__GNUC__) && !defined (NO_ASM)
102:
103: /* We sometimes need to clobber "cc" with gcc2, but that would not be
104: understood by gcc1. Use cpp to avoid major code duplication. */
105: #if __GNUC__ < 2
106: #define __CLOBBER_CC
107: #define __AND_CLOBBER_CC
108: #else /* __GNUC__ >= 2 */
109: #define __CLOBBER_CC : "cc"
110: #define __AND_CLOBBER_CC , "cc"
111: #endif /* __GNUC__ < 2 */
112:
113: #if defined (__alpha) && W_TYPE_SIZE == 64
114: #define umul_ppmm(ph, pl, m0, m1) \
115: do { \
116: UDItype __m0 = (m0), __m1 = (m1); \
1.2 leitner 117: (ph) = __builtin_alpha_umulh (__m0, __m1); \
1.1 leitner 118: (pl) = __m0 * __m1; \
119: } while (0)
120: #define UMUL_TIME 46
121: #ifndef LONGLONG_STANDALONE
122: #define udiv_qrnnd(q, r, n1, n0, d) \
123: do { UDItype __r; \
124: (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
125: (r) = __r; \
126: } while (0)
127: extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
128: #define UDIV_TIME 220
129: #endif /* LONGLONG_STANDALONE */
130: #ifdef __alpha_cix__
1.2 leitner 131: #define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clzl (X))
132: #define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctzl (X))
1.1 leitner 133: #define COUNT_LEADING_ZEROS_0 64
134: #else
135: #define count_leading_zeros(COUNT,X) \
136: do { \
137: UDItype __xr = (X), __t, __a; \
1.2 leitner 138: __t = __builtin_alpha_cmpbge (0, __xr); \
1.1 leitner 139: __a = __clz_tab[__t ^ 0xff] - 1; \
1.2 leitner 140: __t = __builtin_alpha_extbl (__xr, __a); \
1.1 leitner 141: (COUNT) = 64 - (__clz_tab[__t] + __a*8); \
142: } while (0)
143: #define count_trailing_zeros(COUNT,X) \
144: do { \
145: UDItype __xr = (X), __t, __a; \
1.2 leitner 146: __t = __builtin_alpha_cmpbge (0, __xr); \
1.1 leitner 147: __t = ~__t & -~__t; \
148: __a = ((__t & 0xCC) != 0) * 2; \
149: __a += ((__t & 0xF0) != 0) * 4; \
150: __a += ((__t & 0xAA) != 0); \
1.2 leitner 151: __t = __builtin_alpha_extbl (__xr, __a); \
1.1 leitner 152: __a <<= 3; \
153: __t &= -__t; \
154: __a += ((__t & 0xCC) != 0) * 2; \
155: __a += ((__t & 0xF0) != 0) * 4; \
156: __a += ((__t & 0xAA) != 0); \
157: (COUNT) = __a; \
158: } while (0)
159: #endif /* __alpha_cix__ */
160: #endif /* __alpha */
161:
162: #if defined (__arc__) && W_TYPE_SIZE == 32
163: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
164: __asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \
165: : "=r" ((USItype) (sh)), \
166: "=&r" ((USItype) (sl)) \
167: : "%r" ((USItype) (ah)), \
168: "rIJ" ((USItype) (bh)), \
169: "%r" ((USItype) (al)), \
170: "rIJ" ((USItype) (bl)))
171: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
172: __asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \
173: : "=r" ((USItype) (sh)), \
174: "=&r" ((USItype) (sl)) \
175: : "r" ((USItype) (ah)), \
176: "rIJ" ((USItype) (bh)), \
177: "r" ((USItype) (al)), \
178: "rIJ" ((USItype) (bl)))
179: /* Call libgcc routine. */
180: #define umul_ppmm(w1, w0, u, v) \
181: do { \
182: DWunion __w; \
183: __w.ll = __umulsidi3 (u, v); \
184: w1 = __w.s.high; \
185: w0 = __w.s.low; \
186: } while (0)
187: #define __umulsidi3 __umulsidi3
188: UDItype __umulsidi3 (USItype, USItype);
189: #endif
190:
1.2 leitner 191: #if defined (__arm__) && !defined (__thumb__) && W_TYPE_SIZE == 32
1.1 leitner 192: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
193: __asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
194: : "=r" ((USItype) (sh)), \
195: "=&r" ((USItype) (sl)) \
196: : "%r" ((USItype) (ah)), \
197: "rI" ((USItype) (bh)), \
198: "%r" ((USItype) (al)), \
1.2 leitner 199: "rI" ((USItype) (bl)) __CLOBBER_CC)
1.1 leitner 200: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
201: __asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \
202: : "=r" ((USItype) (sh)), \
203: "=&r" ((USItype) (sl)) \
204: : "r" ((USItype) (ah)), \
205: "rI" ((USItype) (bh)), \
206: "r" ((USItype) (al)), \
1.2 leitner 207: "rI" ((USItype) (bl)) __CLOBBER_CC)
1.1 leitner 208: #define umul_ppmm(xh, xl, a, b) \
209: {register USItype __t0, __t1, __t2; \
210: __asm__ ("%@ Inlined umul_ppmm\n" \
211: " mov %2, %5, lsr #16\n" \
212: " mov %0, %6, lsr #16\n" \
213: " bic %3, %5, %2, lsl #16\n" \
214: " bic %4, %6, %0, lsl #16\n" \
215: " mul %1, %3, %4\n" \
216: " mul %4, %2, %4\n" \
217: " mul %3, %0, %3\n" \
218: " mul %0, %2, %0\n" \
219: " adds %3, %4, %3\n" \
220: " addcs %0, %0, #65536\n" \
221: " adds %1, %1, %3, lsl #16\n" \
222: " adc %0, %0, %3, lsr #16" \
223: : "=&r" ((USItype) (xh)), \
224: "=r" ((USItype) (xl)), \
225: "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
226: : "r" ((USItype) (a)), \
1.2 leitner 227: "r" ((USItype) (b)) __CLOBBER_CC );}
1.1 leitner 228: #define UMUL_TIME 20
229: #define UDIV_TIME 100
230: #endif /* __arm__ */
231:
1.2 leitner 232: #if defined(__arm__)
233: /* Let gcc decide how best to implement count_leading_zeros. */
234: #define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
235: #define COUNT_LEADING_ZEROS_0 32
236: #endif
237:
238: #if defined (__CRIS__) && __CRIS_arch_version >= 3
239: #define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clz (X))
240: #if __CRIS_arch_version >= 8
241: #define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctz (X))
242: #endif
243: #endif /* __CRIS__ */
244:
1.1 leitner 245: #if defined (__hppa) && W_TYPE_SIZE == 32
246: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
247: __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \
248: : "=r" ((USItype) (sh)), \
249: "=&r" ((USItype) (sl)) \
250: : "%rM" ((USItype) (ah)), \
251: "rM" ((USItype) (bh)), \
252: "%rM" ((USItype) (al)), \
253: "rM" ((USItype) (bl)))
254: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
255: __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \
256: : "=r" ((USItype) (sh)), \
257: "=&r" ((USItype) (sl)) \
258: : "rM" ((USItype) (ah)), \
259: "rM" ((USItype) (bh)), \
260: "rM" ((USItype) (al)), \
261: "rM" ((USItype) (bl)))
262: #if defined (_PA_RISC1_1)
263: #define umul_ppmm(w1, w0, u, v) \
264: do { \
265: union \
266: { \
267: UDItype __f; \
268: struct {USItype __w1, __w0;} __w1w0; \
269: } __t; \
270: __asm__ ("xmpyu %1,%2,%0" \
271: : "=x" (__t.__f) \
272: : "x" ((USItype) (u)), \
273: "x" ((USItype) (v))); \
274: (w1) = __t.__w1w0.__w1; \
275: (w0) = __t.__w1w0.__w0; \
276: } while (0)
277: #define UMUL_TIME 8
278: #else
279: #define UMUL_TIME 30
280: #endif
281: #define UDIV_TIME 40
282: #define count_leading_zeros(count, x) \
283: do { \
284: USItype __tmp; \
285: __asm__ ( \
286: "ldi 1,%0\n" \
287: " extru,= %1,15,16,%%r0 ; Bits 31..16 zero?\n" \
288: " extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n"\
289: " ldo 16(%0),%0 ; Yes. Perform add.\n" \
290: " extru,= %1,23,8,%%r0 ; Bits 15..8 zero?\n" \
291: " extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n"\
292: " ldo 8(%0),%0 ; Yes. Perform add.\n" \
293: " extru,= %1,27,4,%%r0 ; Bits 7..4 zero?\n" \
294: " extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n"\
295: " ldo 4(%0),%0 ; Yes. Perform add.\n" \
296: " extru,= %1,29,2,%%r0 ; Bits 3..2 zero?\n" \
297: " extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n"\
298: " ldo 2(%0),%0 ; Yes. Perform add.\n" \
299: " extru %1,30,1,%1 ; Extract bit 1.\n" \
300: " sub %0,%1,%0 ; Subtract it.\n" \
301: : "=r" (count), "=r" (__tmp) : "1" (x)); \
302: } while (0)
303: #endif
304:
1.2 leitner 305: #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
1.1 leitner 306: #define smul_ppmm(xh, xl, m0, m1) \
307: do { \
308: union {DItype __ll; \
309: struct {USItype __h, __l;} __i; \
1.2 leitner 310: } __x; \
311: __asm__ ("lr %N0,%1\n\tmr %0,%2" \
312: : "=&r" (__x.__ll) \
313: : "r" (m0), "r" (m1)); \
314: (xh) = __x.__i.__h; (xl) = __x.__i.__l; \
1.1 leitner 315: } while (0)
316: #define sdiv_qrnnd(q, r, n1, n0, d) \
317: do { \
318: union {DItype __ll; \
319: struct {USItype __h, __l;} __i; \
1.2 leitner 320: } __x; \
321: __x.__i.__h = n1; __x.__i.__l = n0; \
1.1 leitner 322: __asm__ ("dr %0,%2" \
1.2 leitner 323: : "=r" (__x.__ll) \
324: : "0" (__x.__ll), "r" (d)); \
325: (q) = __x.__i.__l; (r) = __x.__i.__h; \
1.1 leitner 326: } while (0)
327: #endif
328:
329: #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
330: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1.2 leitner 331: __asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \
1.1 leitner 332: : "=r" ((USItype) (sh)), \
333: "=&r" ((USItype) (sl)) \
334: : "%0" ((USItype) (ah)), \
335: "g" ((USItype) (bh)), \
336: "%1" ((USItype) (al)), \
337: "g" ((USItype) (bl)))
338: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1.2 leitner 339: __asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \
1.1 leitner 340: : "=r" ((USItype) (sh)), \
341: "=&r" ((USItype) (sl)) \
342: : "0" ((USItype) (ah)), \
343: "g" ((USItype) (bh)), \
344: "1" ((USItype) (al)), \
345: "g" ((USItype) (bl)))
346: #define umul_ppmm(w1, w0, u, v) \
1.2 leitner 347: __asm__ ("mul{l} %3" \
1.1 leitner 348: : "=a" ((USItype) (w0)), \
349: "=d" ((USItype) (w1)) \
350: : "%0" ((USItype) (u)), \
351: "rm" ((USItype) (v)))
352: #define udiv_qrnnd(q, r, n1, n0, dv) \
1.2 leitner 353: __asm__ ("div{l} %4" \
1.1 leitner 354: : "=a" ((USItype) (q)), \
355: "=d" ((USItype) (r)) \
356: : "0" ((USItype) (n0)), \
357: "1" ((USItype) (n1)), \
358: "rm" ((USItype) (dv)))
1.2 leitner 359: #define count_leading_zeros(count, x) ((count) = __builtin_clz (x))
360: #define count_trailing_zeros(count, x) ((count) = __builtin_ctz (x))
1.1 leitner 361: #define UMUL_TIME 40
362: #define UDIV_TIME 40
363: #endif /* 80x86 */
364:
1.2 leitner 365: #if (defined (__x86_64__) || defined (__i386__)) && W_TYPE_SIZE == 64
366: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
367: __asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \
368: : "=r" ((UDItype) (sh)), \
369: "=&r" ((UDItype) (sl)) \
370: : "%0" ((UDItype) (ah)), \
371: "rme" ((UDItype) (bh)), \
372: "%1" ((UDItype) (al)), \
373: "rme" ((UDItype) (bl)))
374: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
375: __asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \
376: : "=r" ((UDItype) (sh)), \
377: "=&r" ((UDItype) (sl)) \
378: : "0" ((UDItype) (ah)), \
379: "rme" ((UDItype) (bh)), \
380: "1" ((UDItype) (al)), \
381: "rme" ((UDItype) (bl)))
382: #define umul_ppmm(w1, w0, u, v) \
383: __asm__ ("mul{q} %3" \
384: : "=a" ((UDItype) (w0)), \
385: "=d" ((UDItype) (w1)) \
386: : "%0" ((UDItype) (u)), \
387: "rm" ((UDItype) (v)))
388: #define udiv_qrnnd(q, r, n1, n0, dv) \
389: __asm__ ("div{q} %4" \
390: : "=a" ((UDItype) (q)), \
391: "=d" ((UDItype) (r)) \
392: : "0" ((UDItype) (n0)), \
393: "1" ((UDItype) (n1)), \
394: "rm" ((UDItype) (dv)))
395: #define count_leading_zeros(count, x) ((count) = __builtin_clzl (x))
396: #define count_trailing_zeros(count, x) ((count) = __builtin_ctzl (x))
397: #define UMUL_TIME 40
398: #define UDIV_TIME 40
399: #endif /* x86_64 */
400:
1.1 leitner 401: #if defined (__i960__) && W_TYPE_SIZE == 32
402: #define umul_ppmm(w1, w0, u, v) \
403: ({union {UDItype __ll; \
404: struct {USItype __l, __h;} __i; \
405: } __xx; \
406: __asm__ ("emul %2,%1,%0" \
407: : "=d" (__xx.__ll) \
408: : "%dI" ((USItype) (u)), \
409: "dI" ((USItype) (v))); \
410: (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
411: #define __umulsidi3(u, v) \
412: ({UDItype __w; \
413: __asm__ ("emul %2,%1,%0" \
414: : "=d" (__w) \
415: : "%dI" ((USItype) (u)), \
416: "dI" ((USItype) (v))); \
417: __w; })
418: #endif /* __i960__ */
419:
420: #if defined (__M32R__) && W_TYPE_SIZE == 32
421: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
422: /* The cmp clears the condition bit. */ \
1.2 leitner 423: __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \
1.1 leitner 424: : "=r" ((USItype) (sh)), \
425: "=&r" ((USItype) (sl)) \
1.2 leitner 426: : "0" ((USItype) (ah)), \
1.1 leitner 427: "r" ((USItype) (bh)), \
1.2 leitner 428: "1" ((USItype) (al)), \
1.1 leitner 429: "r" ((USItype) (bl)) \
430: : "cbit")
431: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
432: /* The cmp clears the condition bit. */ \
1.2 leitner 433: __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \
1.1 leitner 434: : "=r" ((USItype) (sh)), \
435: "=&r" ((USItype) (sl)) \
436: : "0" ((USItype) (ah)), \
437: "r" ((USItype) (bh)), \
438: "1" ((USItype) (al)), \
439: "r" ((USItype) (bl)) \
440: : "cbit")
441: #endif /* __M32R__ */
442:
443: #if defined (__mc68000__) && W_TYPE_SIZE == 32
444: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
445: __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0" \
446: : "=d" ((USItype) (sh)), \
447: "=&d" ((USItype) (sl)) \
448: : "%0" ((USItype) (ah)), \
449: "d" ((USItype) (bh)), \
450: "%1" ((USItype) (al)), \
451: "g" ((USItype) (bl)))
452: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
453: __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0" \
454: : "=d" ((USItype) (sh)), \
455: "=&d" ((USItype) (sl)) \
456: : "0" ((USItype) (ah)), \
457: "d" ((USItype) (bh)), \
458: "1" ((USItype) (al)), \
459: "g" ((USItype) (bl)))
460:
1.2 leitner 461: /* The '020, '030, '040, '060 and CPU32 have 32x32->64 and 64/32->32q-32r. */
462: #if (defined (__mc68020__) && !defined (__mc68060__))
1.1 leitner 463: #define umul_ppmm(w1, w0, u, v) \
464: __asm__ ("mulu%.l %3,%1:%0" \
465: : "=d" ((USItype) (w0)), \
466: "=d" ((USItype) (w1)) \
467: : "%0" ((USItype) (u)), \
468: "dmi" ((USItype) (v)))
469: #define UMUL_TIME 45
470: #define udiv_qrnnd(q, r, n1, n0, d) \
471: __asm__ ("divu%.l %4,%1:%0" \
472: : "=d" ((USItype) (q)), \
473: "=d" ((USItype) (r)) \
474: : "0" ((USItype) (n0)), \
475: "1" ((USItype) (n1)), \
476: "dmi" ((USItype) (d)))
477: #define UDIV_TIME 90
478: #define sdiv_qrnnd(q, r, n1, n0, d) \
479: __asm__ ("divs%.l %4,%1:%0" \
480: : "=d" ((USItype) (q)), \
481: "=d" ((USItype) (r)) \
482: : "0" ((USItype) (n0)), \
483: "1" ((USItype) (n1)), \
484: "dmi" ((USItype) (d)))
485:
1.2 leitner 486: #elif defined (__mcoldfire__) /* not mc68020 */
487:
488: #define umul_ppmm(xh, xl, a, b) \
489: __asm__ ("| Inlined umul_ppmm\n" \
490: " move%.l %2,%/d0\n" \
491: " move%.l %3,%/d1\n" \
492: " move%.l %/d0,%/d2\n" \
493: " swap %/d0\n" \
494: " move%.l %/d1,%/d3\n" \
495: " swap %/d1\n" \
496: " move%.w %/d2,%/d4\n" \
497: " mulu %/d3,%/d4\n" \
498: " mulu %/d1,%/d2\n" \
499: " mulu %/d0,%/d3\n" \
500: " mulu %/d0,%/d1\n" \
501: " move%.l %/d4,%/d0\n" \
502: " clr%.w %/d0\n" \
503: " swap %/d0\n" \
504: " add%.l %/d0,%/d2\n" \
505: " add%.l %/d3,%/d2\n" \
506: " jcc 1f\n" \
507: " add%.l %#65536,%/d1\n" \
508: "1: swap %/d2\n" \
509: " moveq %#0,%/d0\n" \
510: " move%.w %/d2,%/d0\n" \
511: " move%.w %/d4,%/d2\n" \
512: " move%.l %/d2,%1\n" \
513: " add%.l %/d1,%/d0\n" \
514: " move%.l %/d0,%0" \
515: : "=g" ((USItype) (xh)), \
516: "=g" ((USItype) (xl)) \
517: : "g" ((USItype) (a)), \
518: "g" ((USItype) (b)) \
519: : "d0", "d1", "d2", "d3", "d4")
520: #define UMUL_TIME 100
521: #define UDIV_TIME 400
522: #else /* not ColdFire */
1.1 leitner 523: /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX. */
524: #define umul_ppmm(xh, xl, a, b) \
525: __asm__ ("| Inlined umul_ppmm\n" \
526: " move%.l %2,%/d0\n" \
527: " move%.l %3,%/d1\n" \
528: " move%.l %/d0,%/d2\n" \
529: " swap %/d0\n" \
530: " move%.l %/d1,%/d3\n" \
531: " swap %/d1\n" \
532: " move%.w %/d2,%/d4\n" \
533: " mulu %/d3,%/d4\n" \
534: " mulu %/d1,%/d2\n" \
535: " mulu %/d0,%/d3\n" \
536: " mulu %/d0,%/d1\n" \
537: " move%.l %/d4,%/d0\n" \
538: " eor%.w %/d0,%/d0\n" \
539: " swap %/d0\n" \
540: " add%.l %/d0,%/d2\n" \
541: " add%.l %/d3,%/d2\n" \
542: " jcc 1f\n" \
543: " add%.l %#65536,%/d1\n" \
544: "1: swap %/d2\n" \
545: " moveq %#0,%/d0\n" \
546: " move%.w %/d2,%/d0\n" \
547: " move%.w %/d4,%/d2\n" \
548: " move%.l %/d2,%1\n" \
549: " add%.l %/d1,%/d0\n" \
550: " move%.l %/d0,%0" \
551: : "=g" ((USItype) (xh)), \
552: "=g" ((USItype) (xl)) \
553: : "g" ((USItype) (a)), \
554: "g" ((USItype) (b)) \
555: : "d0", "d1", "d2", "d3", "d4")
556: #define UMUL_TIME 100
557: #define UDIV_TIME 400
1.2 leitner 558:
1.1 leitner 559: #endif /* not mc68020 */
560:
1.2 leitner 561: /* The '020, '030, '040 and '060 have bitfield insns.
562: cpu32 disguises as a 68020, but lacks them. */
563: #if defined (__mc68020__) && !defined (__mcpu32__)
1.1 leitner 564: #define count_leading_zeros(count, x) \
565: __asm__ ("bfffo %1{%b2:%b2},%0" \
566: : "=d" ((USItype) (count)) \
567: : "od" ((USItype) (x)), "n" (0))
1.2 leitner 568: /* Some ColdFire architectures have a ff1 instruction supported via
569: __builtin_clz. */
570: #elif defined (__mcfisaaplus__) || defined (__mcfisac__)
571: #define count_leading_zeros(count,x) ((count) = __builtin_clz (x))
572: #define COUNT_LEADING_ZEROS_0 32
1.1 leitner 573: #endif
574: #endif /* mc68000 */
575:
576: #if defined (__m88000__) && W_TYPE_SIZE == 32
577: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
578: __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \
579: : "=r" ((USItype) (sh)), \
580: "=&r" ((USItype) (sl)) \
581: : "%rJ" ((USItype) (ah)), \
582: "rJ" ((USItype) (bh)), \
583: "%rJ" ((USItype) (al)), \
584: "rJ" ((USItype) (bl)))
585: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
586: __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \
587: : "=r" ((USItype) (sh)), \
588: "=&r" ((USItype) (sl)) \
589: : "rJ" ((USItype) (ah)), \
590: "rJ" ((USItype) (bh)), \
591: "rJ" ((USItype) (al)), \
592: "rJ" ((USItype) (bl)))
593: #define count_leading_zeros(count, x) \
594: do { \
595: USItype __cbtmp; \
596: __asm__ ("ff1 %0,%1" \
597: : "=r" (__cbtmp) \
598: : "r" ((USItype) (x))); \
599: (count) = __cbtmp ^ 31; \
600: } while (0)
601: #define COUNT_LEADING_ZEROS_0 63 /* sic */
602: #if defined (__mc88110__)
603: #define umul_ppmm(wh, wl, u, v) \
604: do { \
605: union {UDItype __ll; \
606: struct {USItype __h, __l;} __i; \
607: } __xx; \
608: __asm__ ("mulu.d %0,%1,%2" \
609: : "=r" (__xx.__ll) \
610: : "r" ((USItype) (u)), \
611: "r" ((USItype) (v))); \
612: (wh) = __xx.__i.__h; \
613: (wl) = __xx.__i.__l; \
614: } while (0)
615: #define udiv_qrnnd(q, r, n1, n0, d) \
616: ({union {UDItype __ll; \
617: struct {USItype __h, __l;} __i; \
618: } __xx; \
619: USItype __q; \
620: __xx.__i.__h = (n1); __xx.__i.__l = (n0); \
621: __asm__ ("divu.d %0,%1,%2" \
622: : "=r" (__q) \
623: : "r" (__xx.__ll), \
624: "r" ((USItype) (d))); \
625: (r) = (n0) - __q * (d); (q) = __q; })
626: #define UMUL_TIME 5
627: #define UDIV_TIME 25
628: #else
629: #define UMUL_TIME 17
630: #define UDIV_TIME 150
631: #endif /* __mc88110__ */
632: #endif /* __m88000__ */
633:
634: #if defined (__mips__) && W_TYPE_SIZE == 32
1.2 leitner 635: #define umul_ppmm(w1, w0, u, v) \
636: do { \
637: UDItype __x = (UDItype) (USItype) (u) * (USItype) (v); \
638: (w1) = (USItype) (__x >> 32); \
639: (w0) = (USItype) (__x); \
640: } while (0)
1.1 leitner 641: #define UMUL_TIME 10
642: #define UDIV_TIME 100
1.2 leitner 643:
644: #if (__mips == 32 || __mips == 64) && ! __mips16
645: #define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
646: #define COUNT_LEADING_ZEROS_0 32
647: #endif
1.1 leitner 648: #endif /* __mips__ */
649:
650: #if defined (__ns32000__) && W_TYPE_SIZE == 32
651: #define umul_ppmm(w1, w0, u, v) \
652: ({union {UDItype __ll; \
653: struct {USItype __l, __h;} __i; \
654: } __xx; \
655: __asm__ ("meid %2,%0" \
656: : "=g" (__xx.__ll) \
657: : "%0" ((USItype) (u)), \
658: "g" ((USItype) (v))); \
659: (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
660: #define __umulsidi3(u, v) \
661: ({UDItype __w; \
662: __asm__ ("meid %2,%0" \
663: : "=g" (__w) \
664: : "%0" ((USItype) (u)), \
665: "g" ((USItype) (v))); \
666: __w; })
667: #define udiv_qrnnd(q, r, n1, n0, d) \
668: ({union {UDItype __ll; \
669: struct {USItype __l, __h;} __i; \
670: } __xx; \
671: __xx.__i.__h = (n1); __xx.__i.__l = (n0); \
672: __asm__ ("deid %2,%0" \
673: : "=g" (__xx.__ll) \
674: : "0" (__xx.__ll), \
675: "g" ((USItype) (d))); \
676: (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
677: #define count_trailing_zeros(count,x) \
678: do { \
679: __asm__ ("ffsd %2,%0" \
680: : "=r" ((USItype) (count)) \
681: : "0" ((USItype) 0), \
682: "r" ((USItype) (x))); \
683: } while (0)
684: #endif /* __ns32000__ */
685:
686: /* FIXME: We should test _IBMR2 here when we add assembly support for the
687: system vendor compilers.
688: FIXME: What's needed for gcc PowerPC VxWorks? __vxworks__ is not good
689: enough, since that hits ARM and m68k too. */
690: #if (defined (_ARCH_PPC) /* AIX */ \
691: || defined (_ARCH_PWR) /* AIX */ \
692: || defined (_ARCH_COM) /* AIX */ \
693: || defined (__powerpc__) /* gcc */ \
694: || defined (__POWERPC__) /* BEOS */ \
695: || defined (__ppc__) /* Darwin */ \
1.2 leitner 696: || (defined (PPC) && ! defined (CPU_FAMILY)) /* gcc 2.7.x GNU&SysV */ \
697: || (defined (PPC) && defined (CPU_FAMILY) /* VxWorks */ \
698: && CPU_FAMILY == PPC) \
1.1 leitner 699: ) && W_TYPE_SIZE == 32
700: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
701: do { \
702: if (__builtin_constant_p (bh) && (bh) == 0) \
703: __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
704: : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
705: else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \
706: __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
707: : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
708: else \
709: __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
710: : "=r" (sh), "=&r" (sl) \
711: : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \
712: } while (0)
713: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
714: do { \
715: if (__builtin_constant_p (ah) && (ah) == 0) \
716: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
717: : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
718: else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0) \
719: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
720: : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
721: else if (__builtin_constant_p (bh) && (bh) == 0) \
722: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
723: : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
724: else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \
725: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
726: : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
727: else \
728: __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
729: : "=r" (sh), "=&r" (sl) \
730: : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \
731: } while (0)
732: #define count_leading_zeros(count, x) \
733: __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
734: #define COUNT_LEADING_ZEROS_0 32
735: #if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
1.2 leitner 736: || defined (__ppc__) \
737: || (defined (PPC) && ! defined (CPU_FAMILY)) /* gcc 2.7.x GNU&SysV */ \
738: || (defined (PPC) && defined (CPU_FAMILY) /* VxWorks */ \
739: && CPU_FAMILY == PPC)
1.1 leitner 740: #define umul_ppmm(ph, pl, m0, m1) \
741: do { \
742: USItype __m0 = (m0), __m1 = (m1); \
743: __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
744: (pl) = __m0 * __m1; \
745: } while (0)
746: #define UMUL_TIME 15
747: #define smul_ppmm(ph, pl, m0, m1) \
748: do { \
749: SItype __m0 = (m0), __m1 = (m1); \
750: __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
751: (pl) = __m0 * __m1; \
752: } while (0)
753: #define SMUL_TIME 14
754: #define UDIV_TIME 120
755: #elif defined (_ARCH_PWR)
756: #define UMUL_TIME 8
757: #define smul_ppmm(xh, xl, m0, m1) \
758: __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
759: #define SMUL_TIME 4
760: #define sdiv_qrnnd(q, r, nh, nl, d) \
761: __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
762: #define UDIV_TIME 100
763: #endif
764: #endif /* 32-bit POWER architecture variants. */
765:
766: /* We should test _IBMR2 here when we add assembly support for the system
767: vendor compilers. */
768: #if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
769: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
770: do { \
771: if (__builtin_constant_p (bh) && (bh) == 0) \
772: __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
773: : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
774: else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \
775: __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
776: : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
777: else \
778: __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
779: : "=r" (sh), "=&r" (sl) \
780: : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \
781: } while (0)
782: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
783: do { \
784: if (__builtin_constant_p (ah) && (ah) == 0) \
785: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
786: : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
787: else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0) \
788: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
789: : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
790: else if (__builtin_constant_p (bh) && (bh) == 0) \
791: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
792: : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
793: else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \
794: __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
795: : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
796: else \
797: __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
798: : "=r" (sh), "=&r" (sl) \
799: : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \
800: } while (0)
801: #define count_leading_zeros(count, x) \
802: __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
803: #define COUNT_LEADING_ZEROS_0 64
804: #define umul_ppmm(ph, pl, m0, m1) \
805: do { \
806: UDItype __m0 = (m0), __m1 = (m1); \
807: __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
808: (pl) = __m0 * __m1; \
809: } while (0)
810: #define UMUL_TIME 15
811: #define smul_ppmm(ph, pl, m0, m1) \
812: do { \
813: DItype __m0 = (m0), __m1 = (m1); \
814: __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \
815: (pl) = __m0 * __m1; \
816: } while (0)
817: #define SMUL_TIME 14 /* ??? */
818: #define UDIV_TIME 120 /* ??? */
819: #endif /* 64-bit PowerPC. */
820:
821: #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
822: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
823: __asm__ ("a %1,%5\n\tae %0,%3" \
824: : "=r" ((USItype) (sh)), \
825: "=&r" ((USItype) (sl)) \
826: : "%0" ((USItype) (ah)), \
827: "r" ((USItype) (bh)), \
828: "%1" ((USItype) (al)), \
829: "r" ((USItype) (bl)))
830: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
831: __asm__ ("s %1,%5\n\tse %0,%3" \
832: : "=r" ((USItype) (sh)), \
833: "=&r" ((USItype) (sl)) \
834: : "0" ((USItype) (ah)), \
835: "r" ((USItype) (bh)), \
836: "1" ((USItype) (al)), \
837: "r" ((USItype) (bl)))
838: #define umul_ppmm(ph, pl, m0, m1) \
839: do { \
840: USItype __m0 = (m0), __m1 = (m1); \
841: __asm__ ( \
842: "s r2,r2\n" \
843: " mts r10,%2\n" \
844: " m r2,%3\n" \
845: " m r2,%3\n" \
846: " m r2,%3\n" \
847: " m r2,%3\n" \
848: " m r2,%3\n" \
849: " m r2,%3\n" \
850: " m r2,%3\n" \
851: " m r2,%3\n" \
852: " m r2,%3\n" \
853: " m r2,%3\n" \
854: " m r2,%3\n" \
855: " m r2,%3\n" \
856: " m r2,%3\n" \
857: " m r2,%3\n" \
858: " m r2,%3\n" \
859: " m r2,%3\n" \
860: " cas %0,r2,r0\n" \
861: " mfs r10,%1" \
862: : "=r" ((USItype) (ph)), \
863: "=r" ((USItype) (pl)) \
864: : "%r" (__m0), \
865: "r" (__m1) \
866: : "r2"); \
867: (ph) += ((((SItype) __m0 >> 31) & __m1) \
868: + (((SItype) __m1 >> 31) & __m0)); \
869: } while (0)
870: #define UMUL_TIME 20
871: #define UDIV_TIME 200
872: #define count_leading_zeros(count, x) \
873: do { \
874: if ((x) >= 0x10000) \
875: __asm__ ("clz %0,%1" \
876: : "=r" ((USItype) (count)) \
877: : "r" ((USItype) (x) >> 16)); \
878: else \
879: { \
880: __asm__ ("clz %0,%1" \
881: : "=r" ((USItype) (count)) \
882: : "r" ((USItype) (x))); \
883: (count) += 16; \
884: } \
885: } while (0)
886: #endif
887:
1.2 leitner 888: #if defined(__sh__) && !__SHMEDIA__ && W_TYPE_SIZE == 32
889: #ifndef __sh1__
1.1 leitner 890: #define umul_ppmm(w1, w0, u, v) \
891: __asm__ ( \
1.2 leitner 892: "dmulu.l %2,%3\n\tsts%M1 macl,%1\n\tsts%M0 mach,%0" \
893: : "=r<" ((USItype)(w1)), \
894: "=r<" ((USItype)(w0)) \
1.1 leitner 895: : "r" ((USItype)(u)), \
896: "r" ((USItype)(v)) \
897: : "macl", "mach")
898: #define UMUL_TIME 5
899: #endif
900:
1.2 leitner 901: /* This is the same algorithm as __udiv_qrnnd_c. */
902: #define UDIV_NEEDS_NORMALIZATION 1
903:
904: #define udiv_qrnnd(q, r, n1, n0, d) \
905: do { \
906: extern UWtype __udiv_qrnnd_16 (UWtype, UWtype) \
907: __attribute__ ((visibility ("hidden"))); \
908: /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */ \
909: __asm__ ( \
910: "mov%M4 %4,r5\n" \
911: " swap.w %3,r4\n" \
912: " swap.w r5,r6\n" \
913: " jsr @%5\n" \
914: " shll16 r6\n" \
915: " swap.w r4,r4\n" \
916: " jsr @%5\n" \
917: " swap.w r1,%0\n" \
918: " or r1,%0" \
919: : "=r" (q), "=&z" (r) \
920: : "1" (n1), "r" (n0), "rm" (d), "r" (&__udiv_qrnnd_16) \
921: : "r1", "r2", "r4", "r5", "r6", "pr", "t"); \
922: } while (0)
923:
924: #define UDIV_TIME 80
925:
926: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
927: __asm__ ("clrt;subc %5,%1; subc %4,%0" \
928: : "=r" (sh), "=r" (sl) \
929: : "0" (ah), "1" (al), "r" (bh), "r" (bl) \
930: : "t")
931:
932: #endif /* __sh__ */
933:
1.1 leitner 934: #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
935: #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
936: #define count_leading_zeros(count, x) \
937: do \
938: { \
939: UDItype x_ = (USItype)(x); \
940: SItype c_; \
941: \
942: __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_)); \
943: (count) = c_ - 31; \
944: } \
945: while (0)
946: #define COUNT_LEADING_ZEROS_0 32
947: #endif
948:
949: #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
950: && W_TYPE_SIZE == 32
951: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
952: __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \
953: : "=r" ((USItype) (sh)), \
954: "=&r" ((USItype) (sl)) \
955: : "%rJ" ((USItype) (ah)), \
956: "rI" ((USItype) (bh)), \
957: "%rJ" ((USItype) (al)), \
958: "rI" ((USItype) (bl)) \
959: __CLOBBER_CC)
960: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
961: __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \
962: : "=r" ((USItype) (sh)), \
963: "=&r" ((USItype) (sl)) \
964: : "rJ" ((USItype) (ah)), \
965: "rI" ((USItype) (bh)), \
966: "rJ" ((USItype) (al)), \
967: "rI" ((USItype) (bl)) \
968: __CLOBBER_CC)
969: #if defined (__sparc_v8__)
970: #define umul_ppmm(w1, w0, u, v) \
971: __asm__ ("umul %2,%3,%1;rd %%y,%0" \
972: : "=r" ((USItype) (w1)), \
973: "=r" ((USItype) (w0)) \
974: : "r" ((USItype) (u)), \
975: "r" ((USItype) (v)))
976: #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
977: __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
978: : "=&r" ((USItype) (__q)), \
979: "=&r" ((USItype) (__r)) \
980: : "r" ((USItype) (__n1)), \
981: "r" ((USItype) (__n0)), \
982: "r" ((USItype) (__d)))
983: #else
984: #if defined (__sparclite__)
985: /* This has hardware multiply but not divide. It also has two additional
986: instructions scan (ffs from high bit) and divscc. */
987: #define umul_ppmm(w1, w0, u, v) \
988: __asm__ ("umul %2,%3,%1;rd %%y,%0" \
989: : "=r" ((USItype) (w1)), \
990: "=r" ((USItype) (w0)) \
991: : "r" ((USItype) (u)), \
992: "r" ((USItype) (v)))
993: #define udiv_qrnnd(q, r, n1, n0, d) \
994: __asm__ ("! Inlined udiv_qrnnd\n" \
995: " wr %%g0,%2,%%y ! Not a delayed write for sparclite\n" \
996: " tst %%g0\n" \
997: " divscc %3,%4,%%g1\n" \
998: " divscc %%g1,%4,%%g1\n" \
999: " divscc %%g1,%4,%%g1\n" \
1000: " divscc %%g1,%4,%%g1\n" \
1001: " divscc %%g1,%4,%%g1\n" \
1002: " divscc %%g1,%4,%%g1\n" \
1003: " divscc %%g1,%4,%%g1\n" \
1004: " divscc %%g1,%4,%%g1\n" \
1005: " divscc %%g1,%4,%%g1\n" \
1006: " divscc %%g1,%4,%%g1\n" \
1007: " divscc %%g1,%4,%%g1\n" \
1008: " divscc %%g1,%4,%%g1\n" \
1009: " divscc %%g1,%4,%%g1\n" \
1010: " divscc %%g1,%4,%%g1\n" \
1011: " divscc %%g1,%4,%%g1\n" \
1012: " divscc %%g1,%4,%%g1\n" \
1013: " divscc %%g1,%4,%%g1\n" \
1014: " divscc %%g1,%4,%%g1\n" \
1015: " divscc %%g1,%4,%%g1\n" \
1016: " divscc %%g1,%4,%%g1\n" \
1017: " divscc %%g1,%4,%%g1\n" \
1018: " divscc %%g1,%4,%%g1\n" \
1019: " divscc %%g1,%4,%%g1\n" \
1020: " divscc %%g1,%4,%%g1\n" \
1021: " divscc %%g1,%4,%%g1\n" \
1022: " divscc %%g1,%4,%%g1\n" \
1023: " divscc %%g1,%4,%%g1\n" \
1024: " divscc %%g1,%4,%%g1\n" \
1025: " divscc %%g1,%4,%%g1\n" \
1026: " divscc %%g1,%4,%%g1\n" \
1027: " divscc %%g1,%4,%%g1\n" \
1028: " divscc %%g1,%4,%0\n" \
1029: " rd %%y,%1\n" \
1030: " bl,a 1f\n" \
1031: " add %1,%4,%1\n" \
1032: "1: ! End of inline udiv_qrnnd" \
1033: : "=r" ((USItype) (q)), \
1034: "=r" ((USItype) (r)) \
1035: : "r" ((USItype) (n1)), \
1036: "r" ((USItype) (n0)), \
1037: "rI" ((USItype) (d)) \
1038: : "g1" __AND_CLOBBER_CC)
1039: #define UDIV_TIME 37
1040: #define count_leading_zeros(count, x) \
1041: do { \
1042: __asm__ ("scan %1,1,%0" \
1043: : "=r" ((USItype) (count)) \
1044: : "r" ((USItype) (x))); \
1045: } while (0)
1046: /* Early sparclites return 63 for an argument of 0, but they warn that future
1047: implementations might change this. Therefore, leave COUNT_LEADING_ZEROS_0
1048: undefined. */
1049: #else
1050: /* SPARC without integer multiplication and divide instructions.
1051: (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
1052: #define umul_ppmm(w1, w0, u, v) \
1053: __asm__ ("! Inlined umul_ppmm\n" \
1054: " wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n"\
1055: " sra %3,31,%%o5 ! Don't move this insn\n" \
1056: " and %2,%%o5,%%o5 ! Don't move this insn\n" \
1057: " andcc %%g0,0,%%g1 ! Don't move this insn\n" \
1058: " mulscc %%g1,%3,%%g1\n" \
1059: " mulscc %%g1,%3,%%g1\n" \
1060: " mulscc %%g1,%3,%%g1\n" \
1061: " mulscc %%g1,%3,%%g1\n" \
1062: " mulscc %%g1,%3,%%g1\n" \
1063: " mulscc %%g1,%3,%%g1\n" \
1064: " mulscc %%g1,%3,%%g1\n" \
1065: " mulscc %%g1,%3,%%g1\n" \
1066: " mulscc %%g1,%3,%%g1\n" \
1067: " mulscc %%g1,%3,%%g1\n" \
1068: " mulscc %%g1,%3,%%g1\n" \
1069: " mulscc %%g1,%3,%%g1\n" \
1070: " mulscc %%g1,%3,%%g1\n" \
1071: " mulscc %%g1,%3,%%g1\n" \
1072: " mulscc %%g1,%3,%%g1\n" \
1073: " mulscc %%g1,%3,%%g1\n" \
1074: " mulscc %%g1,%3,%%g1\n" \
1075: " mulscc %%g1,%3,%%g1\n" \
1076: " mulscc %%g1,%3,%%g1\n" \
1077: " mulscc %%g1,%3,%%g1\n" \
1078: " mulscc %%g1,%3,%%g1\n" \
1079: " mulscc %%g1,%3,%%g1\n" \
1080: " mulscc %%g1,%3,%%g1\n" \
1081: " mulscc %%g1,%3,%%g1\n" \
1082: " mulscc %%g1,%3,%%g1\n" \
1083: " mulscc %%g1,%3,%%g1\n" \
1084: " mulscc %%g1,%3,%%g1\n" \
1085: " mulscc %%g1,%3,%%g1\n" \
1086: " mulscc %%g1,%3,%%g1\n" \
1087: " mulscc %%g1,%3,%%g1\n" \
1088: " mulscc %%g1,%3,%%g1\n" \
1089: " mulscc %%g1,%3,%%g1\n" \
1090: " mulscc %%g1,0,%%g1\n" \
1091: " add %%g1,%%o5,%0\n" \
1092: " rd %%y,%1" \
1093: : "=r" ((USItype) (w1)), \
1094: "=r" ((USItype) (w0)) \
1095: : "%rI" ((USItype) (u)), \
1096: "r" ((USItype) (v)) \
1097: : "g1", "o5" __AND_CLOBBER_CC)
1098: #define UMUL_TIME 39 /* 39 instructions */
1099: /* It's quite necessary to add this much assembler for the sparc.
1100: The default udiv_qrnnd (in C) is more than 10 times slower! */
1101: #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1102: __asm__ ("! Inlined udiv_qrnnd\n" \
1103: " mov 32,%%g1\n" \
1104: " subcc %1,%2,%%g0\n" \
1105: "1: bcs 5f\n" \
1106: " addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \
1107: " sub %1,%2,%1 ! this kills msb of n\n" \
1108: " addx %1,%1,%1 ! so this can't give carry\n" \
1109: " subcc %%g1,1,%%g1\n" \
1110: "2: bne 1b\n" \
1111: " subcc %1,%2,%%g0\n" \
1112: " bcs 3f\n" \
1113: " addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \
1114: " b 3f\n" \
1115: " sub %1,%2,%1 ! this kills msb of n\n" \
1116: "4: sub %1,%2,%1\n" \
1117: "5: addxcc %1,%1,%1\n" \
1118: " bcc 2b\n" \
1119: " subcc %%g1,1,%%g1\n" \
1120: "! Got carry from n. Subtract next step to cancel this carry.\n" \
1121: " bne 4b\n" \
1122: " addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n" \
1123: " sub %1,%2,%1\n" \
1124: "3: xnor %0,0,%0\n" \
1125: " ! End of inline udiv_qrnnd" \
1126: : "=&r" ((USItype) (__q)), \
1127: "=&r" ((USItype) (__r)) \
1128: : "r" ((USItype) (__d)), \
1129: "1" ((USItype) (__n1)), \
1130: "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1131: #define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */
1132: #endif /* __sparclite__ */
1133: #endif /* __sparc_v8__ */
1134: #endif /* sparc32 */
1135:
1136: #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1137: && W_TYPE_SIZE == 64
1138: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1139: __asm__ ("addcc %r4,%5,%1\n\t" \
1140: "add %r2,%3,%0\n\t" \
1141: "bcs,a,pn %%xcc, 1f\n\t" \
1142: "add %0, 1, %0\n" \
1143: "1:" \
1144: : "=r" ((UDItype)(sh)), \
1145: "=&r" ((UDItype)(sl)) \
1146: : "%rJ" ((UDItype)(ah)), \
1147: "rI" ((UDItype)(bh)), \
1148: "%rJ" ((UDItype)(al)), \
1149: "rI" ((UDItype)(bl)) \
1150: __CLOBBER_CC)
1151:
1152: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1153: __asm__ ("subcc %r4,%5,%1\n\t" \
1154: "sub %r2,%3,%0\n\t" \
1155: "bcs,a,pn %%xcc, 1f\n\t" \
1156: "sub %0, 1, %0\n\t" \
1157: "1:" \
1158: : "=r" ((UDItype)(sh)), \
1159: "=&r" ((UDItype)(sl)) \
1160: : "rJ" ((UDItype)(ah)), \
1161: "rI" ((UDItype)(bh)), \
1162: "rJ" ((UDItype)(al)), \
1163: "rI" ((UDItype)(bl)) \
1164: __CLOBBER_CC)
1165:
1166: #define umul_ppmm(wh, wl, u, v) \
1167: do { \
1168: UDItype tmp1, tmp2, tmp3, tmp4; \
1169: __asm__ __volatile__ ( \
1170: "srl %7,0,%3\n\t" \
1171: "mulx %3,%6,%1\n\t" \
1172: "srlx %6,32,%2\n\t" \
1173: "mulx %2,%3,%4\n\t" \
1174: "sllx %4,32,%5\n\t" \
1175: "srl %6,0,%3\n\t" \
1176: "sub %1,%5,%5\n\t" \
1177: "srlx %5,32,%5\n\t" \
1178: "addcc %4,%5,%4\n\t" \
1179: "srlx %7,32,%5\n\t" \
1180: "mulx %3,%5,%3\n\t" \
1181: "mulx %2,%5,%5\n\t" \
1182: "sethi %%hi(0x80000000),%2\n\t" \
1183: "addcc %4,%3,%4\n\t" \
1184: "srlx %4,32,%4\n\t" \
1185: "add %2,%2,%2\n\t" \
1186: "movcc %%xcc,%%g0,%2\n\t" \
1187: "addcc %5,%4,%5\n\t" \
1188: "sllx %3,32,%3\n\t" \
1189: "add %1,%3,%1\n\t" \
1190: "add %5,%2,%0" \
1191: : "=r" ((UDItype)(wh)), \
1192: "=&r" ((UDItype)(wl)), \
1193: "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
1194: : "r" ((UDItype)(u)), \
1195: "r" ((UDItype)(v)) \
1196: __CLOBBER_CC); \
1197: } while (0)
1198: #define UMUL_TIME 96
1199: #define UDIV_TIME 230
1200: #endif /* sparc64 */
1201:
1202: #if defined (__vax__) && W_TYPE_SIZE == 32
1203: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1204: __asm__ ("addl2 %5,%1\n\tadwc %3,%0" \
1205: : "=g" ((USItype) (sh)), \
1206: "=&g" ((USItype) (sl)) \
1207: : "%0" ((USItype) (ah)), \
1208: "g" ((USItype) (bh)), \
1209: "%1" ((USItype) (al)), \
1210: "g" ((USItype) (bl)))
1211: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1212: __asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \
1213: : "=g" ((USItype) (sh)), \
1214: "=&g" ((USItype) (sl)) \
1215: : "0" ((USItype) (ah)), \
1216: "g" ((USItype) (bh)), \
1217: "1" ((USItype) (al)), \
1218: "g" ((USItype) (bl)))
1219: #define umul_ppmm(xh, xl, m0, m1) \
1220: do { \
1221: union { \
1222: UDItype __ll; \
1223: struct {USItype __l, __h;} __i; \
1224: } __xx; \
1225: USItype __m0 = (m0), __m1 = (m1); \
1226: __asm__ ("emul %1,%2,$0,%0" \
1227: : "=r" (__xx.__ll) \
1228: : "g" (__m0), \
1229: "g" (__m1)); \
1230: (xh) = __xx.__i.__h; \
1231: (xl) = __xx.__i.__l; \
1232: (xh) += ((((SItype) __m0 >> 31) & __m1) \
1233: + (((SItype) __m1 >> 31) & __m0)); \
1234: } while (0)
1235: #define sdiv_qrnnd(q, r, n1, n0, d) \
1236: do { \
1237: union {DItype __ll; \
1238: struct {SItype __l, __h;} __i; \
1239: } __xx; \
1240: __xx.__i.__h = n1; __xx.__i.__l = n0; \
1241: __asm__ ("ediv %3,%2,%0,%1" \
1242: : "=g" (q), "=g" (r) \
1243: : "g" (__xx.__ll), "g" (d)); \
1244: } while (0)
1245: #endif /* __vax__ */
1246:
1.2 leitner 1247: #if defined (__xtensa__) && W_TYPE_SIZE == 32
1248: /* This code is not Xtensa-configuration-specific, so rely on the compiler
1249: to expand builtin functions depending on what configuration features
1250: are available. This avoids library calls when the operation can be
1251: performed in-line. */
1252: #define umul_ppmm(w1, w0, u, v) \
1253: do { \
1254: DWunion __w; \
1255: __w.ll = __builtin_umulsidi3 (u, v); \
1256: w1 = __w.s.high; \
1257: w0 = __w.s.low; \
1258: } while (0)
1259: #define __umulsidi3(u, v) __builtin_umulsidi3 (u, v)
1260: #define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clz (X))
1261: #define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctz (X))
1262: #endif /* __xtensa__ */
1263:
1.1 leitner 1264: #if defined (__z8000__) && W_TYPE_SIZE == 16
1265: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1266: __asm__ ("add %H1,%H5\n\tadc %H0,%H3" \
1267: : "=r" ((unsigned int)(sh)), \
1268: "=&r" ((unsigned int)(sl)) \
1269: : "%0" ((unsigned int)(ah)), \
1270: "r" ((unsigned int)(bh)), \
1271: "%1" ((unsigned int)(al)), \
1272: "rQR" ((unsigned int)(bl)))
1273: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1274: __asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \
1275: : "=r" ((unsigned int)(sh)), \
1276: "=&r" ((unsigned int)(sl)) \
1277: : "0" ((unsigned int)(ah)), \
1278: "r" ((unsigned int)(bh)), \
1279: "1" ((unsigned int)(al)), \
1280: "rQR" ((unsigned int)(bl)))
1281: #define umul_ppmm(xh, xl, m0, m1) \
1282: do { \
1283: union {long int __ll; \
1284: struct {unsigned int __h, __l;} __i; \
1285: } __xx; \
1286: unsigned int __m0 = (m0), __m1 = (m1); \
1287: __asm__ ("mult %S0,%H3" \
1288: : "=r" (__xx.__i.__h), \
1289: "=r" (__xx.__i.__l) \
1290: : "%1" (__m0), \
1291: "rQR" (__m1)); \
1292: (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
1293: (xh) += ((((signed int) __m0 >> 15) & __m1) \
1294: + (((signed int) __m1 >> 15) & __m0)); \
1295: } while (0)
1296: #endif /* __z8000__ */
1297:
1298: #endif /* __GNUC__ */
1299:
1300: /* If this machine has no inline assembler, use C macros. */
1301:
1302: #if !defined (add_ssaaaa)
1303: #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1304: do { \
1305: UWtype __x; \
1306: __x = (al) + (bl); \
1307: (sh) = (ah) + (bh) + (__x < (al)); \
1308: (sl) = __x; \
1309: } while (0)
1310: #endif
1311:
1312: #if !defined (sub_ddmmss)
1313: #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1314: do { \
1315: UWtype __x; \
1316: __x = (al) - (bl); \
1317: (sh) = (ah) - (bh) - (__x > (al)); \
1318: (sl) = __x; \
1319: } while (0)
1320: #endif
1321:
1.2 leitner 1322: /* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
1323: smul_ppmm. */
1324: #if !defined (umul_ppmm) && defined (smul_ppmm)
1325: #define umul_ppmm(w1, w0, u, v) \
1326: do { \
1327: UWtype __w1; \
1328: UWtype __xm0 = (u), __xm1 = (v); \
1329: smul_ppmm (__w1, w0, __xm0, __xm1); \
1330: (w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1) \
1331: + (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0); \
1332: } while (0)
1333: #endif
1334:
1335: /* If we still don't have umul_ppmm, define it using plain C. */
1.1 leitner 1336: #if !defined (umul_ppmm)
1337: #define umul_ppmm(w1, w0, u, v) \
1338: do { \
1339: UWtype __x0, __x1, __x2, __x3; \
1340: UHWtype __ul, __vl, __uh, __vh; \
1341: \
1342: __ul = __ll_lowpart (u); \
1343: __uh = __ll_highpart (u); \
1344: __vl = __ll_lowpart (v); \
1345: __vh = __ll_highpart (v); \
1346: \
1347: __x0 = (UWtype) __ul * __vl; \
1348: __x1 = (UWtype) __ul * __vh; \
1349: __x2 = (UWtype) __uh * __vl; \
1350: __x3 = (UWtype) __uh * __vh; \
1351: \
1352: __x1 += __ll_highpart (__x0);/* this can't give carry */ \
1353: __x1 += __x2; /* but this indeed can */ \
1354: if (__x1 < __x2) /* did we get it? */ \
1355: __x3 += __ll_B; /* yes, add it in the proper pos. */ \
1356: \
1357: (w1) = __x3 + __ll_highpart (__x1); \
1358: (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
1359: } while (0)
1360: #endif
1361:
1362: #if !defined (__umulsidi3)
1363: #define __umulsidi3(u, v) \
1364: ({DWunion __w; \
1365: umul_ppmm (__w.s.high, __w.s.low, u, v); \
1366: __w.ll; })
1367: #endif
1368:
1369: /* Define this unconditionally, so it can be used for debugging. */
1370: #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1371: do { \
1372: UWtype __d1, __d0, __q1, __q0; \
1373: UWtype __r1, __r0, __m; \
1374: __d1 = __ll_highpart (d); \
1375: __d0 = __ll_lowpart (d); \
1376: \
1377: __r1 = (n1) % __d1; \
1378: __q1 = (n1) / __d1; \
1379: __m = (UWtype) __q1 * __d0; \
1380: __r1 = __r1 * __ll_B | __ll_highpart (n0); \
1381: if (__r1 < __m) \
1382: { \
1383: __q1--, __r1 += (d); \
1384: if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1385: if (__r1 < __m) \
1386: __q1--, __r1 += (d); \
1387: } \
1388: __r1 -= __m; \
1389: \
1390: __r0 = __r1 % __d1; \
1391: __q0 = __r1 / __d1; \
1392: __m = (UWtype) __q0 * __d0; \
1393: __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
1394: if (__r0 < __m) \
1395: { \
1396: __q0--, __r0 += (d); \
1397: if (__r0 >= (d)) \
1398: if (__r0 < __m) \
1399: __q0--, __r0 += (d); \
1400: } \
1401: __r0 -= __m; \
1402: \
1403: (q) = (UWtype) __q1 * __ll_B | __q0; \
1404: (r) = __r0; \
1405: } while (0)
1406:
1407: /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1408: __udiv_w_sdiv (defined in libgcc or elsewhere). */
1409: #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1410: #define udiv_qrnnd(q, r, nh, nl, d) \
1411: do { \
1412: USItype __r; \
1413: (q) = __udiv_w_sdiv (&__r, nh, nl, d); \
1414: (r) = __r; \
1415: } while (0)
1416: #endif
1417:
1418: /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */
1419: #if !defined (udiv_qrnnd)
1420: #define UDIV_NEEDS_NORMALIZATION 1
1421: #define udiv_qrnnd __udiv_qrnnd_c
1422: #endif
1423:
1424: #if !defined (count_leading_zeros)
1425: #define count_leading_zeros(count, x) \
1426: do { \
1427: UWtype __xr = (x); \
1428: UWtype __a; \
1429: \
1430: if (W_TYPE_SIZE <= 32) \
1431: { \
1432: __a = __xr < ((UWtype)1<<2*__BITS4) \
1433: ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4) \
1434: : (__xr < ((UWtype)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \
1435: } \
1436: else \
1437: { \
1438: for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \
1439: if (((__xr >> __a) & 0xff) != 0) \
1440: break; \
1441: } \
1442: \
1443: (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a); \
1444: } while (0)
1445: #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1446: #endif
1447:
1448: #if !defined (count_trailing_zeros)
1449: /* Define count_trailing_zeros using count_leading_zeros. The latter might be
1450: defined in asm, but if it is not, the C version above is good enough. */
1451: #define count_trailing_zeros(count, x) \
1452: do { \
1453: UWtype __ctz_x = (x); \
1454: UWtype __ctz_c; \
1455: count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \
1456: (count) = W_TYPE_SIZE - 1 - __ctz_c; \
1457: } while (0)
1458: #endif
1459:
1460: #ifndef UDIV_NEEDS_NORMALIZATION
1461: #define UDIV_NEEDS_NORMALIZATION 0
1462: #endif