Leadtek WinFast PxDVR3200 H: Difference between revisions
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[[Image:Leadtek_Winfast_PxDVR3200_H_Board1.jpg|thumb|250px|right|Leadtek Winfast PxDVR 3200 H PCB showing component labels (Click for High Resolution Version)]] |
[[Image:Leadtek_Winfast_PxDVR3200_H_Board1.jpg|thumb|250px|right|Leadtek Winfast PxDVR 3200 H PCB showing component labels (Click for High Resolution Version)]] |
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An hybrid Analog/DVB-T PCIe card |
An [[hybrid]] Analog/[[DVB-T]] [[DVB-T PCIe Cards|PCIe card]] from [[Leadtek]]. There are two revisions of this card, the tuner chip can be either Xceive XC3028 or XC4000. |
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It is not supported under Linux. However, experimental support for the DVB-T side is available (see below for details). |
It is not supported under Linux. However, experimental support for the DVB-T side is available (see below for details). |
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==Overview/Features== |
==Overview/Features== |
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Able to deliver one analogue channel or one digital channel. |
Able to deliver one analogue channel or one digital channel with onboard mpeg2 encoder. |
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High definition resolution is 1920 x 1080. |
High definition resolution is 1920 x 1080. |
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| Line 11: | Line 11: | ||
*Conexant CX23417 Analogue Video to MPEG2 encoder |
*Conexant CX23417 Analogue Video to MPEG2 encoder |
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*Intel CE 6353 (Zarlink: zl10353) demodulator |
*Intel CE 6353 (Zarlink: zl10353) demodulator |
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*Xceive xc3028 tuner (analogue and digital) |
*Xceive xc3028 tuner (for card 107d:6681; analogue and digital) |
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*Xceive xc4000 tuner (for card 107d:6f39; analogue and digital) |
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===Identification=== |
===Identification=== |
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| Line 57: | Line 58: | ||
===Firmware=== |
===Firmware=== |
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The driver requires the standard xc3028 firmware (xc3028-v27.fw), to obtain the firmware see |
The driver for the xc3028 version of the card requires the standard xc3028 firmware (xc3028-v27.fw), to obtain the firmware see [[Xceive_XC3028/XC2028#How_to_Obtain_the_Firmware|How to Obtain Firmware for XC3028]]. |
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===Drivers=== |
===Drivers=== |
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As of 29 August 2008, the drivers for the DVB side and xc3028 only have been incorporpated into the main v4l-dvb tree, these will eventually be included into the linux kernel. |
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There is currently no in kernel drivers for the device. However, the card's digital functionality is supported in a test patch available on the mailing list here: http://linuxtv.org/pipermail/linux-dvb/2008-August/027717.html |
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This patch will shortly be applied to a test branch, once a view minor items have sorted out. |
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A patch that implements support for the xc4000 revision is available at [http://istvanv.users.sourceforge.net/v4l/xc4000.html http://istvanv.users.sourceforge.net/v4l/xc4000.html]. |
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| ⚫ | |||
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*Successful tuning of typical Australian channels. |
*Successful tuning of typical Australian channels. |
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*Successful tuning and viewing of typical Italian channels using gxine (some issues with Mythtv to be resolved). |
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==Further Development Material== |
==Further Development Material== |
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Further development is required to get the Analog side of this card working. Other items not working at the moment are the radio and remote. |
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<H3>RegSpy dumps</H3> |
<H3>RegSpy dumps</H3> |
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==External Links== |
==External Links== |
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* [http://leadtek.com.tw/eng/tv_tuner/overview.asp?lineid=6&pronameid=377 Leadtek Winfast PxDVR 3200 H product page] |
* [http://leadtek.com.tw/eng/tv_tuner/overview.asp?lineid=6&pronameid=377 Leadtek Winfast PxDVR 3200 H product page] |
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[[Category:DVB-T PCIe Cards]] |
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Latest revision as of 11:19, 26 March 2010
An hybrid Analog/DVB-T PCIe card from Leadtek. There are two revisions of this card, the tuner chip can be either Xceive XC3028 or XC4000.
It is not supported under Linux. However, experimental support for the DVB-T side is available (see below for details).
Overview/Features
Able to deliver one analogue channel or one digital channel with onboard mpeg2 encoder. High definition resolution is 1920 x 1080.
Components Used
- Conexant CX23885 PCIe bridge
- Conexant CX23417 Analogue Video to MPEG2 encoder
- Intel CE 6353 (Zarlink: zl10353) demodulator
- Xceive xc3028 tuner (for card 107d:6681; analogue and digital)
- Xceive xc4000 tuner (for card 107d:6f39; analogue and digital)
Identification
02:00.0 Multimedia video controller: Conexant Unknown device 8852 (rev 02) Subsystem: LeadTek Research Inc. Unknown device 6681 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at fd800000 (64-bit, non-prefetchable) [size=2M] Capabilities: [40] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <2us, L1 <4us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [90] Vital Product Data <?> Capabilities: [a0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [100] Advanced Error Reporting <?> Capabilities: [200] Virtual Channel <?> Kernel driver in use: cx23885 Kernel modules: cx23885
Other images
CX23417 mpeg2 encoder
CX23885 PCIe A/V Decoder
Intel CE 6353 (Zarlink: zl10353) DVB demodulator
Supplied remote control.
Making it Work
Firmware
The driver for the xc3028 version of the card requires the standard xc3028 firmware (xc3028-v27.fw), to obtain the firmware see How to Obtain Firmware for XC3028.
Drivers
As of 29 August 2008, the drivers for the DVB side and xc3028 only have been incorporpated into the main v4l-dvb tree, these will eventually be included into the linux kernel.
A patch that implements support for the xc4000 revision is available at http://istvanv.users.sourceforge.net/v4l/xc4000.html.
Driver Test Results
- Successful tuning of typical Australian channels.
- Successful tuning and viewing of typical Italian channels using gxine (some issues with Mythtv to be resolved).
Further Development Material
Further development is required to get the Analog side of this card working. Other items not working at the moment are the radio and remote.
RegSpy dumps
DVB-T Mode
CX23885 Card [0]:
Vendor ID: 0x14f1
Device ID: 0x8852
Subsystem ID: 0x6681107d
CX23885 Card - Register Dump:
| GP0_IO: | 00070404 | (00000000 00000111 00000100 00000100) |
| GPIO_ISM: | 00000000 | (00000000 00000000 00000000 00000000) |
| DEV_CNTRL2: | 00000020 | (00000000 00000000 00000000 00100000) |
| PCI_INT_MSK: | 0000000d | (00000000 00000000 00000000 00001101) |
| PCI_INT_STAT: | 03aac000 | (00000011 10101010 11000000 00000000) |
| PCI_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSK: | 00011101 | (00000000 00000001 00010001 00000001) |
| VID_C_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_SRC_SEL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_HW_SOP_CTL: | 00470bc0 | (00000000 01000111 00001011 11000000) |
| VID_B_GEN_CTL: | 00000008 | (00000000 00000000 00000000 00001000) |
| VID_B_BD_PKT_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_SOP_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_FIFO_OVFL_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_VLD_MISC: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_TS_CLK_EN: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_B_VIP_CTRL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_PIXEL_FRMT: | 0000000c | (00000000 00000000 00000000 00001100) |
| VID_C_INT_MSK: | 00011101 | (00000000 00000001 00010001 00000001) |
| VID_C_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_GPCNT: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_C_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_C_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_DMA_CTL: | 00000011 | (00000000 00000000 00000000 00010001) |
| VID_C_LNGTH: | 000002f0 | (00000000 00000000 00000010 11110000) |
| VID_C_HW_SOP_CTL: | 00470bc0 | (00000000 01000111 00001011 11000000) |
| VID_C_GEN_CTL: | 0000001d | (00000000 00000000 00000000 00011101) |
| VID_C_BD_PKT_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_SOP_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_FIFO_OVFL_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_VLD_MISC: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_TS_CLK_EN: | 00000001 | (00000000 00000000 00000000 00000001) |
| AUDIO_INT_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| RDR_CFG0: | 885214f1 | (10001000 01010010 00010100 11110001) |
| RDR_CFG1: | 00100006 | (00000000 00010000 00000000 00000110) |
| RDR_TLCTL0: | 0309c00d | (00000011 00001001 11000000 00001101) |
| DMA1_PTR1: | 00000c40 | (00000000 00000000 00001100 01000000) |
| DMA2_PTR1: | 00001840 | (00000000 00000000 00011000 01000000) |
| DMA3_PTR1: | 00ecbff8 | (00000000 11101100 10111111 11111000) |
| DMA4_PTR1: | 00effdfc | (00000000 11101111 11111101 11111100) |
| DMA5_PTR1: | 000067e0 | (00000000 00000000 01100111 11100000) |
| DMA6_PTR1: | 000074d0 | (00000000 00000000 01110100 11010000) |
| DMA7_PTR1: | 00feffc4 | (00000000 11111110 11111111 11000100) |
| DMA8_PTR1: | 00f3bf98 | (00000000 11110011 10111111 10011000) |
| DMA1_PTR2: | 000105a8 | (00000000 00000001 00000101 10101000) |
| DMA2_PTR2: | 000105c8 | (00000000 00000001 00000101 11001000) |
| DMA3_PTR2: | 007fa65c | (00000000 01111111 10100110 01011100) |
| DMA4_PTR2: | 00a41404 | (00000000 10100100 00010100 00000100) |
| DMA5_PTR2: | 00010698 | (00000000 00000001 00000110 10011000) |
| DMA6_PTR2: | 000106f8 | (00000000 00000001 00000110 11111000) |
| DMA7_PTR2: | 00801fcc | (00000000 10000000 00011111 11001100) |
| DMA8_PTR2: | 00ebcbec | (00000000 11101011 11001011 11101100) |
| DMA1_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA2_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA3_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA4_CNT1: | 000004ff | (00000000 00000000 00000100 11111111) |
| DMA5_CNT1: | 0000002b | (00000000 00000000 00000000 00101011) |
| DMA6_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA7_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA8_CNT1: | 000007fa | (00000000 00000000 00000111 11111010) |
| DMA1_CNT2: | 00000003 | (00000000 00000000 00000000 00000011) |
| DMA2_CNT2: | 00000007 | (00000000 00000000 00000000 00000111) |
| DMA3_CNT2: | 0000071e | (00000000 00000000 00000111 00011110) |
| DMA4_CNT2: | 000007f6 | (00000000 00000000 00000111 11110110) |
| DMA5_CNT2: | 00000001 | (00000000 00000000 00000000 00000001) |
| DMA6_CNT2: | 00000005 | (00000000 00000000 00000000 00000101) |
| DMA7_CNT2: | 000007dd | (00000000 00000000 00000111 11011101) |
| DMA8_CNT2: | 000001ff | (00000000 00000000 00000001 11111111) |
| TM_CNT_LDW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_CNT_UW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_LMT_LDW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_LMT_UW: | 00000000 | (00000000 00000000 00000000 00000000) |
| SOFT_RESET: | 00000000 | (00000000 00000000 00000000 00000000) |
| MC417_RWD: | 0000f644 | (00000000 00000000 11110110 01000100) |
| MC417_OEN: | 00001000 | (00000000 00000000 00010000 00000000) |
| MC417_CTL: | 00000037 | (00000000 00000000 00000000 00110111) |
| CLK_DELAY: | 00000011 | (00000000 00000000 00000000 00010001) |
| PAD_CTRL: | 00500300 | (00000000 01010000 00000011 00000000) |
| VID_A_GPCNT: | 00000382 | (00000000 00000000 00000011 10000010) |
| VBI_A_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_VIP_CTRL: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_A_PIXEL_FRMT: | 00000004 | (00000000 00000000 00000000 00000100) |
| VID_A_VBI_CTRL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_A_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| I2C1_ADDR: | 1e000010 | (00011110 00000000 00000000 00010000) |
| I2C1_WDATA: | 00000171 | (00000000 00000000 00000001 01110001) |
| I2C1_CTRL: | 9d001107 | (10011101 00000000 00010001 00000111) |
| I2C1_RDATA: | 34ff30a8 | (00110100 11111111 00110000 10101000) |
| I2C1_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| I2C2_ADDR: | c2000000 | (11000010 00000000 00000000 00000000) |
| I2C2_WDATA: | da870000 | (11011010 10000111 00000000 00000000) |
| I2C2_CTRL: | 27024004 | (00100111 00000010 01000000 00000100) |
| I2C2_RDATA: | 0000d40b | (00000000 00000000 11010100 00001011) |
| I2C2_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| I2C3_ADDR: | 88016400 | (10001000 00000001 01100100 00000000) |
| I2C3_WDATA: | 00000000 | (00000000 00000000 00000000 00000000) |
| I2C3_CTRL: | 07003304 | (00000111 00000000 00110011 00000100) |
| I2C3_RDATA: | 00007701 | (00000000 00000000 01110111 00000001) |
| I2C3_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| UART_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| UART_BRD: | 00000145 | (00000000 00000000 00000001 01000101) |
| UART_ISR: | 00000000 | (00000000 00000000 00000000 00000000) |
| UART_CNT: | 00000000 | (00000000 00000000 00000000 00000000) |
end of dump
Analog Mode
CX23885 Card [0]:
Vendor ID: 0x14f1
Device ID: 0x8852
Subsystem ID: 0x6681107d
CX23885 Card - Register Dump:
| GP0_IO: | 00070404 | (00000000 00000111 00000100 00000100) |
| GPIO_ISM: | 00000000 | (00000000 00000000 00000000 00000000) |
| DEV_CNTRL2: | 00000020 | (00000000 00000000 00000000 00100000) |
| PCI_INT_MSK: | 0000000d | (00000000 00000000 00000000 00001101) |
| PCI_INT_STAT: | 03aac000 | (00000011 10101010 11000000 00000000) |
| PCI_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_MSK: | 00011101 | (00000000 00000001 00010001 00000001) |
| VID_A_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_SRC_SEL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_HW_SOP_CTL: | 00470bc0 | (00000000 01000111 00001011 11000000) |
| VID_B_GEN_CTL: | 00000008 | (00000000 00000000 00000000 00001000) |
| VID_B_BD_PKT_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_SOP_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_FIFO_OVFL_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_VLD_MISC: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_TS_CLK_EN: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_B_VIP_CTRL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_PIXEL_FRMT: | 0000000c | (00000000 00000000 00000000 00001100) |
| VID_C_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_GPCNT: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_C_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_C_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_LNGTH: | 000002f0 | (00000000 00000000 00000010 11110000) |
| VID_C_HW_SOP_CTL: | 00470bc0 | (00000000 01000111 00001011 11000000) |
| VID_C_GEN_CTL: | 0000001c | (00000000 00000000 00000000 00011100) |
| VID_C_BD_PKT_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_SOP_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_FIFO_OVFL_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_VLD_MISC: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_TS_CLK_EN: | 00000001 | (00000000 00000000 00000000 00000001) |
| AUDIO_INT_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| RDR_CFG0: | 885214f1 | (10001000 01010010 00010100 11110001) |
| RDR_CFG1: | 00100006 | (00000000 00010000 00000000 00000110) |
| RDR_TLCTL0: | 0309c00d | (00000011 00001001 11000000 00001101) |
| DMA1_PTR1: | 000015b0 | (00000000 00000000 00010101 10110000) |
| DMA2_PTR1: | 00001840 | (00000000 00000000 00011000 01000000) |
| DMA3_PTR1: | 00ecbff8 | (00000000 11101100 10111111 11111000) |
| DMA4_PTR1: | 00effdfc | (00000000 11101111 11111101 11111100) |
| DMA5_PTR1: | 00006e20 | (00000000 00000000 01101110 00100000) |
| DMA6_PTR1: | 000074d0 | (00000000 00000000 01110100 11010000) |
| DMA7_PTR1: | 00feffc4 | (00000000 11111110 11111111 11000100) |
| DMA8_PTR1: | 00f3bf98 | (00000000 11110011 10111111 10011000) |
| DMA1_PTR2: | 00010588 | (00000000 00000001 00000101 10001000) |
| DMA2_PTR2: | 000105c8 | (00000000 00000001 00000101 11001000) |
| DMA3_PTR2: | 007fa65c | (00000000 01111111 10100110 01011100) |
| DMA4_PTR2: | 00a41404 | (00000000 10100100 00010100 00000100) |
| DMA5_PTR2: | 000106a8 | (00000000 00000001 00000110 10101000) |
| DMA6_PTR2: | 000106f8 | (00000000 00000001 00000110 11111000) |
| DMA7_PTR2: | 00801fcc | (00000000 10000000 00011111 11001100) |
| DMA8_PTR2: | 00ebcbec | (00000000 11101011 11001011 11101100) |
| DMA1_CNT1: | 0000004e | (00000000 00000000 00000000 01001110) |
| DMA2_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA3_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA4_CNT1: | 000004ff | (00000000 00000000 00000100 11111111) |
| DMA5_CNT1: | 00000022 | (00000000 00000000 00000000 00100010) |
| DMA6_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA7_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA8_CNT1: | 000007fa | (00000000 00000000 00000111 11111010) |
| DMA1_CNT2: | 00000005 | (00000000 00000000 00000000 00000101) |
| DMA2_CNT2: | 00000007 | (00000000 00000000 00000000 00000111) |
| DMA3_CNT2: | 0000071e | (00000000 00000000 00000111 00011110) |
| DMA4_CNT2: | 000007f6 | (00000000 00000000 00000111 11110110) |
| DMA5_CNT2: | 00000001 | (00000000 00000000 00000000 00000001) |
| DMA6_CNT2: | 00000005 | (00000000 00000000 00000000 00000101) |
| DMA7_CNT2: | 000007dd | (00000000 00000000 00000111 11011101) |
| DMA8_CNT2: | 000001ff | (00000000 00000000 00000001 11111111) |
| TM_CNT_LDW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_CNT_UW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_LMT_LDW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_LMT_UW: | 00000000 | (00000000 00000000 00000000 00000000) |
| SOFT_RESET: | 00000000 | (00000000 00000000 00000000 00000000) |
| MC417_RWD: | 0000f644 | (00000000 00000000 11110110 01000100) |
| MC417_OEN: | 00001000 | (00000000 00000000 00010000 00000000) |
| MC417_CTL: | 00000037 | (00000000 00000000 00000000 00110111) |
| CLK_DELAY: | 00000011 | (00000000 00000000 00000000 00010001) |
| PAD_CTRL: | 00500300 | (00000000 01010000 00000011 00000000) |
| VID_A_GPCNT: | 000001fa | (00000000 00000000 00000001 11111010) |
| VBI_A_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_GPCNT_CTL: | 00000001 | (00000000 00000000 00000000 00000001) |
| VBI_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_DMA_CTL: | 00000011 | (00000000 00000000 00000000 00010001) |
| VID_A_VIP_CTRL: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_A_PIXEL_FRMT: | 00000004 | (00000000 00000000 00000000 00000100) |
| VID_A_VBI_CTRL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_A_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| I2C1_ADDR: | 32000000 | (00110010 00000000 00000000 00000000) |
| I2C1_WDATA: | 00000001 | (00000000 00000000 00000000 00000001) |
| I2C1_CTRL: | 9d002004 | (10011101 00000000 00100000 00000100) |
| I2C1_RDATA: | 34ff30a0 | (00110100 11111111 00110000 10100000) |
| I2C1_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| I2C2_ADDR: | c2000000 | (11000010 00000000 00000000 00000000) |
| I2C2_WDATA: | d0910000 | (11010000 10010001 00000000 00000000) |
| I2C2_CTRL: | 27004004 | (00100111 00000000 01000000 00000100) |
| I2C2_RDATA: | 0000d40b | (00000000 00000000 11010100 00001011) |
| I2C2_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| I2C3_ADDR: | 8800040c | (10001000 00000000 00000100 00001100) |
| I2C3_WDATA: | 00000908 | (00000000 00000000 00001001 00001000) |
| I2C3_CTRL: | 07004207 | (00000111 00000000 01000010 00000111) |
| I2C3_RDATA: | 00778c00 | (00000000 01110111 10001100 00000000) |
| I2C3_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| UART_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| UART_BRD: | 00000145 | (00000000 00000000 00000001 01000101) |
| UART_ISR: | 00000000 | (00000000 00000000 00000000 00000000) |
| UART_CNT: | 00000000 | (00000000 00000000 00000000 00000000) |
end of dump
TV Application Not Running
CX23885 Card [0]:
Vendor ID: 0x14f1
Device ID: 0x8852
Subsystem ID: 0x6681107d
CX23885 Card - Register Dump:
| GP0_IO: | 00070404 | (00000000 00000111 00000100 00000100) |
| GPIO_ISM: | 00000000 | (00000000 00000000 00000000 00000000) |
| DEV_CNTRL2: | 00000020 | (00000000 00000000 00000000 00100000) |
| PCI_INT_MSK: | 0000000d | (00000000 00000000 00000000 00001101) |
| PCI_INT_STAT: | 03aac000 | (00000011 10101010 11000000 00000000) |
| PCI_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_SRC_SEL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_HW_SOP_CTL: | 00470bc0 | (00000000 01000111 00001011 11000000) |
| VID_B_GEN_CTL: | 00000008 | (00000000 00000000 00000000 00001000) |
| VID_B_BD_PKT_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_SOP_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_FIFO_OVFL_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_VLD_MISC: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_TS_CLK_EN: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_B_VIP_CTRL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_B_PIXEL_FRMT: | 0000000c | (00000000 00000000 00000000 00001100) |
| VID_C_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_GPCNT: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_C_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_C_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_LNGTH: | 000002f0 | (00000000 00000000 00000010 11110000) |
| VID_C_HW_SOP_CTL: | 00470bc0 | (00000000 01000111 00001011 11000000) |
| VID_C_GEN_CTL: | 0000001c | (00000000 00000000 00000000 00011100) |
| VID_C_BD_PKT_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_SOP_STATUS: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_FIFO_OVFL_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_VLD_MISC: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_C_TS_CLK_EN: | 00000001 | (00000000 00000000 00000000 00000001) |
| AUDIO_INT_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_INT_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_MSK: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_STAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_MSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUDIO_EXT_INT_SSTAT: | 00000000 | (00000000 00000000 00000000 00000000) |
| RDR_CFG0: | 885214f1 | (10001000 01010010 00010100 11110001) |
| RDR_CFG1: | 00100006 | (00000000 00010000 00000000 00000110) |
| RDR_TLCTL0: | 0309c00d | (00000011 00001001 11000000 00001101) |
| DMA1_PTR1: | 00000210 | (00000000 00000000 00000010 00010000) |
| DMA2_PTR1: | 00001840 | (00000000 00000000 00011000 01000000) |
| DMA3_PTR1: | 00ecbff8 | (00000000 11101100 10111111 11111000) |
| DMA4_PTR1: | 00effdfc | (00000000 11101111 11111101 11111100) |
| DMA5_PTR1: | 00006e20 | (00000000 00000000 01101110 00100000) |
| DMA6_PTR1: | 000074d0 | (00000000 00000000 01110100 11010000) |
| DMA7_PTR1: | 00feffc4 | (00000000 11111110 11111111 11000100) |
| DMA8_PTR1: | 00f3bf98 | (00000000 11110011 10111111 10011000) |
| DMA1_PTR2: | 00010588 | (00000000 00000001 00000101 10001000) |
| DMA2_PTR2: | 000105c8 | (00000000 00000001 00000101 11001000) |
| DMA3_PTR2: | 007fa65c | (00000000 01111111 10100110 01011100) |
| DMA4_PTR2: | 00a41404 | (00000000 10100100 00010100 00000100) |
| DMA5_PTR2: | 000106a8 | (00000000 00000001 00000110 10101000) |
| DMA6_PTR2: | 000106f8 | (00000000 00000001 00000110 11111000) |
| DMA7_PTR2: | 00801fcc | (00000000 10000000 00011111 11001100) |
| DMA8_PTR2: | 00ebcbec | (00000000 11101011 11001011 11101100) |
| DMA1_CNT1: | 0000001d | (00000000 00000000 00000000 00011101) |
| DMA2_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA3_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA4_CNT1: | 000004ff | (00000000 00000000 00000100 11111111) |
| DMA5_CNT1: | 00000022 | (00000000 00000000 00000000 00100010) |
| DMA6_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA7_CNT1: | 00000000 | (00000000 00000000 00000000 00000000) |
| DMA8_CNT1: | 000007fa | (00000000 00000000 00000111 11111010) |
| DMA1_CNT2: | 00000007 | (00000000 00000000 00000000 00000111) |
| DMA2_CNT2: | 00000007 | (00000000 00000000 00000000 00000111) |
| DMA3_CNT2: | 0000071e | (00000000 00000000 00000111 00011110) |
| DMA4_CNT2: | 000007f6 | (00000000 00000000 00000111 11110110) |
| DMA5_CNT2: | 00000001 | (00000000 00000000 00000000 00000001) |
| DMA6_CNT2: | 00000005 | (00000000 00000000 00000000 00000101) |
| DMA7_CNT2: | 000007dd | (00000000 00000000 00000111 11011101) |
| DMA8_CNT2: | 000001ff | (00000000 00000000 00000001 11111111) |
| TM_CNT_LDW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_CNT_UW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_LMT_LDW: | 00000000 | (00000000 00000000 00000000 00000000) |
| TM_LMT_UW: | 00000000 | (00000000 00000000 00000000 00000000) |
| SOFT_RESET: | 00000000 | (00000000 00000000 00000000 00000000) |
| MC417_RWD: | 0000f644 | (00000000 00000000 11110110 01000100) |
| MC417_OEN: | 00001000 | (00000000 00000000 00010000 00000000) |
| MC417_CTL: | 00000037 | (00000000 00000000 00000000 00110111) |
| CLK_DELAY: | 00000011 | (00000000 00000000 00000000 00010001) |
| PAD_CTRL: | 00500300 | (00000000 01010000 00000011 00000000) |
| VID_A_GPCNT: | 00000706 | (00000000 00000000 00000111 00000110) |
| VBI_A_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VBI_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| VID_A_VIP_CTRL: | 00000001 | (00000000 00000000 00000000 00000001) |
| VID_A_PIXEL_FRMT: | 00000004 | (00000000 00000000 00000000 00000100) |
| VID_A_VBI_CTRL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_A_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_INT_B_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_DMA: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_GPCNT: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_GPCNT_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_DMA_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_LNGTH: | 00000000 | (00000000 00000000 00000000 00000000) |
| AUD_EXT_A_MODE: | 00000000 | (00000000 00000000 00000000 00000000) |
| I2C1_ADDR: | 1e000000 | (00011110 00000000 00000000 00000000) |
| I2C1_WDATA: | 00000850 | (00000000 00000000 00001000 01010000) |
| I2C1_CTRL: | 9d002004 | (10011101 00000000 00100000 00000100) |
| I2C1_RDATA: | 34ff300b | (00110100 11111111 00110000 00001011) |
| I2C1_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| I2C2_ADDR: | c2000000 | (11000010 00000000 00000000 00000000) |
| I2C2_WDATA: | 00000800 | (00000000 00000000 00001000 00000000) |
| I2C2_CTRL: | 27004004 | (00100111 00000000 01000000 00000100) |
| I2C2_RDATA: | 0000d40b | (00000000 00000000 11010100 00001011) |
| I2C2_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| I2C3_ADDR: | 8800040c | (10001000 00000000 00000100 00001100) |
| I2C3_WDATA: | 00001008 | (00000000 00000000 00010000 00001000) |
| I2C3_CTRL: | 07004207 | (00000111 00000000 01000010 00000111) |
| I2C3_RDATA: | 00779c00 | (00000000 01110111 10011100 00000000) |
| I2C3_STAT: | 00000001 | (00000000 00000000 00000000 00000001) |
| UART_CTL: | 00000000 | (00000000 00000000 00000000 00000000) |
| UART_BRD: | 00000145 | (00000000 00000000 00000001 01000101) |
| UART_ISR: | 00000000 | (00000000 00000000 00000000 00000000) |
| UART_CNT: | 00000000 | (00000000 00000000 00000000 00000000) |
end of dump