Astrometa DVB-T2: Difference between revisions
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0xA2-0xA3[12-0] PID_30, PID storage register 13 bits wide |
0xA2-0xA3[12-0] PID_30, PID storage register 13 bits wide |
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0xA4-0xA5[12-0] PID_31, PID storage register 13 bits wide |
0xA4-0xA5[12-0] PID_31, PID storage register 13 bits wide |
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==External links== |
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[http://blog.palosaari.fi/2013/10/naked-hardware-14-dvb-t2-usb-tv-stick.html Astrometa HD-901T2 teardown] |
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[http://blog.palosaari.fi/2014/09/naked-hardware-18-astrometa-amdvb-t2-v2.html Astrometa AMDVB-T2 v2 teardown of second revision] |
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Revision as of 15:17, 13 February 2015
RTL2832P configuration
The RTL2832P has 2 PID filter paths. One for the internal demod and one for a possible external one.
External ts mode
0x21[3] enable_ETS, set to enable external ts input 0x21[5] pass_err, when set reject error packets 0x21[6] PID_mode, when set reject matched PIDs 0x21[7] PID_output, when set output data from enabled PID filters 0x22[7-0] PID_enable, when set enable PID in corresponding register (0-7) 0x23[7-0] PID_enable, when set enable PID in corresponding register (8-15) 0x24[7-0] PID_enable, when set enable PID in corresponding register (16-23) 0x25[7-0] PID_enable, when set enable PID in corresponding register (24-31) 0x26-0x27[12-0] PID_0, PID storage register 13 bits wide 0x28-0x29[12-0] PID_1, PID storage register 13 bits wide 0x2A-0x2B[12-0] PID_2, PID storage register 13 bits wide 0x2C-0x2D[12-0] PID_3, PID storage register 13 bits wide 0x2E-0x2F[12-0] PID_4, PID storage register 13 bits wide 0x30-0x31[12-0] PID_5, PID storage register 13 bits wide 0x32-0x33[12-0] PID_6, PID storage register 13 bits wide 0x34-0x35[12-0] PID_7, PID storage register 13 bits wide 0x36-0x37[12-0] PID_8, PID storage register 13 bits wide 0x38-0x39[12-0] PID_9, PID storage register 13 bits wide 0x3A-0x3B[12-0] PID_10, PID storage register 13 bits wide 0x3C-0x3D[12-0] PID_11, PID storage register 13 bits wide 0x3E-0x3F[12-0] PID_12, PID storage register 13 bits wide 0x40-0x41[12-0] PID_13, PID storage register 13 bits wide 0x42-0x43[12-0] PID_14, PID storage register 13 bits wide 0x44-0x45[12-0] PID_15, PID storage register 13 bits wide 0x46-0x47[12-0] PID_16, PID storage register 13 bits wide 0x48-0x49[12-0] PID_17, PID storage register 13 bits wide 0x4A-0x4B[12-0] PID_18, PID storage register 13 bits wide 0x4C-0x4D[12-0] PID_19, PID storage register 13 bits wide 0x4E-0x4F[12-0] PID_20, PID storage register 13 bits wide 0x50-0x51[12-0] PID_21, PID storage register 13 bits wide 0x52-0x53[12-0] PID_22, PID storage register 13 bits wide 0x54-0x55[12-0] PID_23, PID storage register 13 bits wide 0x56-0x57[12-0] PID_24, PID storage register 13 bits wide 0x58-0x59[12-0] PID_25, PID storage register 13 bits wide 0x5A-0x5B[12-0] PID_26, PID storage register 13 bits wide 0x5C-0x5D[12-0] PID_27, PID storage register 13 bits wide 0x5E-0x5F[12-0] PID_28, PID storage register 13 bits wide These filters would overlap with the internal ts address space. 0x60-0x61[12-0] PID_29, PID storage register 13 bits wide 0x62-0x63[12-0] PID_30, PID storage register 13 bits wide 0x64-0x65[12-0] PID_31, PID storage register 13 bits wide Most likely the the external PID filter path has less then 32 pid filters.
Internal ts mode
0x61[5] pass_err, when set reject error packets 0x61[6] PID_mode, when set reject matched PIDs 0x61[7] PID_output, when set output data from enabled PID filters 0x62[7-0] PID_enable, when set enable PID in corresponding register (0-7) 0x63[7-0] PID_enable, when set enable PID in corresponding register (8-15) 0x64[7-0] PID_enable, when set enable PID in corresponding register (16-23) 0x65[7-0] PID_enable, when set enable PID in corresponding register (24-31) 0x66-0x67[12-0] PID_0, PID storage register 13 bits wide 0x68-0x69[12-0] PID_1, PID storage register 13 bits wide 0x6A-0x6B[12-0] PID_2, PID storage register 13 bits wide 0x6C-0x6D[12-0] PID_3, PID storage register 13 bits wide 0x6E-0x6F[12-0] PID_4, PID storage register 13 bits wide 0x70-0x71[12-0] PID_5, PID storage register 13 bits wide 0x72-0x73[12-0] PID_6, PID storage register 13 bits wide 0x74-0x75[12-0] PID_7, PID storage register 13 bits wide 0x76-0x77[12-0] PID_8, PID storage register 13 bits wide 0x78-0x79[12-0] PID_9, PID storage register 13 bits wide 0x7A-0x7B[12-0] PID_10, PID storage register 13 bits wide 0x7C-0x7D[12-0] PID_11, PID storage register 13 bits wide 0x7E-0x7F[12-0] PID_12, PID storage register 13 bits wide 0x80-0x81[12-0] PID_13, PID storage register 13 bits wide 0x82-0x83[12-0] PID_14, PID storage register 13 bits wide 0x84-0x85[12-0] PID_15, PID storage register 13 bits wide 0x86-0x87[12-0] PID_16, PID storage register 13 bits wide 0x88-0x89[12-0] PID_17, PID storage register 13 bits wide 0x8A-0x8B[12-0] PID_18, PID storage register 13 bits wide 0x8C-0x8D[12-0] PID_19, PID storage register 13 bits wide 0x8E-0x8F[12-0] PID_20, PID storage register 13 bits wide 0x90-0x91[12-0] PID_21, PID storage register 13 bits wide 0x92-0x93[12-0] PID_22, PID storage register 13 bits wide 0x94-0x95[12-0] PID_23, PID storage register 13 bits wide 0x96-0x97[12-0] PID_24, PID storage register 13 bits wide 0x98-0x99[12-0] PID_25, PID storage register 13 bits wide 0x9A-0x9B[12-0] PID_26, PID storage register 13 bits wide 0x9C-0x9D[12-0] PID_27, PID storage register 13 bits wide 0x9E-0x9F[12-0] PID_28, PID storage register 13 bits wide 0xA0-0xA1[12-0] PID_29, PID storage register 13 bits wide 0xA2-0xA3[12-0] PID_30, PID storage register 13 bits wide 0xA4-0xA5[12-0] PID_31, PID storage register 13 bits wide
External links
Astrometa HD-901T2 teardown Astrometa AMDVB-T2 v2 teardown of second revision