/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20160831-64
* Copyright (c) 2000 - 2016 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of ssdt2.dat, Sun Sep 4 22:21:23 2016
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000654 (1620)
* Revision 0x01
* Checksum 0x35
* OEM ID "CpuDpf"
* OEM Table ID "CpuDptf"
* OEM Revision 0x00001000 (4096)
* Compiler ID "INTL"
* Compiler Version 0x20120913 (538052883)
*/
DefinitionBlock ("", "SSDT", 1, "CpuDpf", "CpuDptf", 0x00001000)
{
External (_PR_.CPU0, ProcessorObj)
External (_PR_.CPU0._PPC, UnknownObj)
External (_PR_.CPU0._PSS, IntObj)
External (_PR_.CPU0._PTC, IntObj)
External (_PR_.CPU0._TDL, IntObj)
External (_PR_.CPU0._TPC, IntObj)
External (_PR_.CPU0._TSD, IntObj)
External (_PR_.CPU0._TSS, IntObj)
External (_PR_.CPU1, ProcessorObj)
External (_PR_.CPU2, ProcessorObj)
External (_PR_.CPU3, ProcessorObj)
External (_SB_.ACTT, IntObj)
External (_SB_.ADP1._PSR, MethodObj) // 0 Arguments
External (_SB_.DLPO, PkgObj)
External (_SB_.DPTF.CTOK, IntObj)
External (_SB_.MBID, UnknownObj)
External (_SB_.PAGD, UnknownObj)
External (_SB_.PAGD.IDCN, IntObj)
External (_SB_.PCI0, DeviceObj)
External (_SB_.PCI0.I2C1, UnknownObj)
External (_SB_.PCI0.I2C7.PMI5.SRCD, MethodObj) // 0 Arguments
External (_SB_.PDBG, IntObj)
External (BDID, FieldUnitObj)
External (DPSR, FieldUnitObj)
Scope (\_SB.PCI0)
{
Device (PNIT)
{
Name (_ADR, 0x000B0000) // _ADR: Address
Name (CTYP, Zero)
Name (_DEP, Package (0x02) // _DEP: Dependencies
{
\_SB.MBID,
\_SB.PCI0.I2C1
})
Name (CINT, 0x04)
Name (LSTM, Zero)
Name (MED4, 0xE00000D4)
Name (MED0, 0xE00000D0)
Name (AEXL, Package (0x04)
{
"Svchost.exe",
"dllhost.exe",
"smss.exe",
"WinSAT.exe"
})
Name (PPCC, Package (0x02)
{
0x02,
Package (0x06)
{
Zero,
0x05DC,
0x3A98,
0x03E8,
0x03E8,
0xC8
}
})
Name (CLPO, Package (0x06)
{
One,
Zero,
One,
0x19,
0x02,
0x02
})
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
CLPO [One] = DerefOf (DLPO [One])
CLPO [0x02] = DerefOf (DLPO [0x02])
CLPO [0x03] = DerefOf (DLPO [0x03])
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (DPSR == Zero)
{
Return (Zero)
}
Return (0x0F)
}
OperationRegion (SOCP, 0x8E, Zero, 0x04)
Field (SOCP, DWordAcc, NoLock, Preserve)
{
DDRT, 32
}
Name (AVBD, Zero)
Method (_REG, 2, NotSerialized) // _REG: Region Availability
{
If (Arg0 == 0x8E)
{
AVBD = Arg1
}
}
Method (MBIW, 4, Serialized)
{
MED4 = Arg3
If (Arg2 == Zero)
{
Local1 = 0x10
}
ElseIf (Arg2 == One)
{
Local1 = 0x30
}
Else
{
Local1 = 0xF0
}
Local0 = ((Arg0 << 0x10) | (Arg1 << 0x08))
Local0 |= Local1
Local0 |= 0x11000000
MED0 = Local0
}
Method (MBIR, 4, Serialized)
{
If (Arg2 == Zero)
{
Local1 = 0x10
}
ElseIf (Arg2 == One)
{
Local1 = 0x30
}
Else
{
Local1 = 0xF0
}
Local0 = ((Arg0 << 0x10) | (Arg1 << 0x08))
Local0 |= Local1
Local0 |= 0x10000000
MED0 = Local0
Arg3 = MED4 /* \_SB_.PCI0.PNIT.MED4 */
}
Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities
{
Debug = "cpudptf: _PPC Called"
Return (Zero)
}
Method (SPPC, 1, Serialized)
{
Debug = "cpudptf: SPPC Called"
\_PR.CPU0._PPC = Arg0
Notify (\_PR.CPU0, 0x80) // Status Change
Notify (\_PR.CPU1, 0x80) // Status Change
Notify (\_PR.CPU2, 0x80) // Status Change
Notify (\_PR.CPU3, 0x80) // Status Change
Return (Zero)
}
Name (PURE, One)
Method (SPUR, 1, Serialized)
{
Name (_DEP, Package (0x01) // _DEP: Dependencies
{
\_SB.PAGD
})
\_SB.PAGD.IDCN = Arg0
Notify (\_SB.PAGD, 0x80) // Status Change
Return (Zero)
}
Method (_DTI, 1, NotSerialized) // _DTI: Device Temperature Indication
{
LSTM = Arg0
}
Method (_NTT, 0, NotSerialized) // _NTT: Notification Temperature Threshold
{
Return (0x0ADE)
}
Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States
{
Debug = "cpudptf: _PSS Called"
If (CondRefOf (\_PR.CPU0._PSS, Local0))
{
Return (\_PR.CPU0._PSS) /* External reference */
}
Else
{
Return (Package (0x01)
{
Package (0x06)
{
Zero,
Zero,
Zero,
Zero,
Zero,
Zero
}
})
}
Return (Package (0x01)
{
Package (0x06)
{
Zero,
Zero,
Zero,
Zero,
Zero,
Zero
}
})
}
Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
{
Debug = "cpudptf: _TSS Called"
If (CondRefOf (\_PR.CPU0._TSS, Local0))
{
Return (\_PR.CPU0._TSS) /* External reference */
}
Else
{
Return (Package (0x01)
{
Package (0x05)
{
Zero,
Zero,
Zero,
Zero,
Zero
}
})
}
Return (Package (0x01)
{
Package (0x05)
{
Zero,
Zero,
Zero,
Zero,
Zero
}
})
}
Method (_TPC, 0, NotSerialized) // _TPC: Throttling Present Capabilities
{
Debug = "cpudptf: _TPC Called"
If (CondRefOf (\_PR.CPU0._TPC, Local0))
{
Return (\_PR.CPU0._TPC) /* External reference */
}
Else
{
Return (Zero)
}
Return (Zero)
}
Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
{
Debug = "cpudptf: _PTC Called"
If (CondRefOf (\_PR.CPU0._PTC, Local0))
{
Return (\_PR.CPU0._PTC) /* External reference */
}
Else
{
Return (Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
}
Return (Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
}
Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
{
Debug = "cpudptf: _TSD Called"
If (CondRefOf (\_PR.CPU0._TSD, Local0))
{
Return (\_PR.CPU0._TSD) /* External reference */
}
Else
{
Return (Package (0x01)
{
Package (0x05)
{
0x05,
Zero,
Zero,
Zero,
Zero
}
})
}
Return (Package (0x01)
{
Package (0x05)
{
0x05,
Zero,
Zero,
Zero,
Zero
}
})
}
Method (_TDL, 0, NotSerialized) // _TDL: T-State Depth Limit
{
Debug = "cpudptf: _TDL Called"
If (CondRefOf (\_PR.CPU0._TDL, Local0))
{
Return (\_PR.CPU0._TDL) /* External reference */
}
Else
{
Return (Zero)
}
Return (Zero)
}
Method (_PDL, 0, NotSerialized) // _PDL: P-state Depth Limit
{
Debug = "cpudptf: _PDL Called"
If (CondRefOf (\_PR.CPU0._PSS, Local0))
{
Name (LFMI, Zero)
LFMI = SizeOf (\_PR.CPU0._PSS)
LFMI--
Return (LFMI) /* \_SB_.PCI0.PNIT._PDL.LFMI */
}
Else
{
Return (Zero)
}
Return (Zero)
}
Method (_PSV, 0, Serialized) // _PSV: Passive Temperature
{
If ((BDID == 0x08) || (BDID == 0x0A))
{
If (\_SB.PCI0.I2C7.PMI5.SRCD () == Zero)
{
Return (\_SB.DPTF.CTOK) /* External reference */
(ACTT - 0x05)
}
}
ElseIf (\_SB.ADP1._PSR () == Zero)
{
Return (\_SB.DPTF.CTOK) /* External reference */
(ACTT - 0x05)
}
Return (\_SB.DPTF.CTOK) /* External reference */
ACTT
}
Method (_SCP, 3, Serialized) // _SCP: Set Cooling Policy
{
If ((Arg0 == Zero) || (Arg0 == One))
{
CTYP = Arg0
Notify (PNIT, 0x91) // Device-Specific
}
}
Name (GTSH, 0x14)
Method (SDBG, 0, NotSerialized)
{
Return (PDBG) /* External reference */
}
}
}
}
/*
Raw Table Data: Length 1620 (0x654)
0000: 53 53 44 54 54 06 00 00 01 35 43 70 75 44 70 66 // SSDTT....5CpuDpf
0010: 43 70 75 44 70 74 66 00 00 10 00 00 49 4E 54 4C // CpuDptf.....INTL
0020: 13 09 12 20 10 4F 62 5C 2E 5F 53 42 5F 50 43 49 // ... .Ob\._SB_PCI
0030: 30 5B 82 41 62 50 4E 49 54 08 5F 41 44 52 0C 00 // 0[.AbPNIT._ADR..
0040: 00 0B 00 08 43 54 59 50 00 08 5F 44 45 50 12 1B // ....CTYP.._DEP..
0050: 02 5C 2E 5F 53 42 5F 4D 42 49 44 5C 2F 03 5F 53 // .\._SB_MBID\/._S
0060: 42 5F 50 43 49 30 49 32 43 31 08 43 49 4E 54 0A // B_PCI0I2C1.CINT.
0070: 04 08 4C 53 54 4D 00 08 4D 45 44 34 0C D4 00 00 // ..LSTM..MED4....
0080: E0 08 4D 45 44 30 0C D0 00 00 E0 08 41 45 58 4C // ..MED0......AEXL
0090: 12 32 04 0D 53 76 63 68 6F 73 74 2E 65 78 65 00 // .2..Svchost.exe.
00A0: 0D 64 6C 6C 68 6F 73 74 2E 65 78 65 00 0D 73 6D // .dllhost.exe..sm
00B0: 73 73 2E 65 78 65 00 0D 57 69 6E 53 41 54 2E 65 // ss.exe..WinSAT.e
00C0: 78 65 00 08 50 50 43 43 12 16 02 0A 02 12 11 06 // xe..PPCC........
00D0: 00 0B DC 05 0B 98 3A 0B E8 03 0B E8 03 0A C8 08 // ......:.........
00E0: 43 4C 50 4F 12 0B 06 01 00 01 0A 19 0A 02 0A 02 // CLPO............
00F0: 14 3A 5F 49 4E 49 00 70 83 88 44 4C 50 4F 01 00 // .:_INI.p..DLPO..
0100: 88 43 4C 50 4F 01 00 70 83 88 44 4C 50 4F 0A 02 // .CLPO..p..DLPO..
0110: 00 88 43 4C 50 4F 0A 02 00 70 83 88 44 4C 50 4F // ..CLPO...p..DLPO
0120: 0A 03 00 88 43 4C 50 4F 0A 03 00 14 13 5F 53 54 // ....CLPO....._ST
0130: 41 00 A0 09 93 44 50 53 52 00 A4 00 A4 0A 0F 5B // A....DPSR......[
0140: 80 53 4F 43 50 8E 00 0A 04 5B 81 0B 53 4F 43 50 // .SOCP....[..SOCP
0150: 03 44 44 52 54 20 08 41 56 42 44 00 14 12 5F 52 // .DDRT .AVBD..._R
0160: 45 47 02 A0 0B 93 68 0A 8E 70 69 41 56 42 44 14 // EG....h..piAVBD.
0170: 45 04 4D 42 49 57 0C 70 6B 4D 45 44 34 A0 08 93 // E.MBIW.pkMED4...
0180: 6A 00 70 0A 10 61 A1 10 A0 08 93 6A 01 70 0A 30 // j.p..a.....j.p.0
0190: 61 A1 05 70 0A F0 61 7D 79 68 0A 10 00 79 69 0A // a..p..a}yh...yi.
01A0: 08 00 60 7D 60 61 60 7D 60 0C 00 00 00 11 60 70 // ..`}`a`}`.....`p
01B0: 60 4D 45 44 30 14 45 04 4D 42 49 52 0C A0 08 93 // `MED0.E.MBIR....
01C0: 6A 00 70 0A 10 61 A1 10 A0 08 93 6A 01 70 0A 30 // j.p..a.....j.p.0
01D0: 61 A1 05 70 0A F0 61 7D 79 68 0A 10 00 79 69 0A // a..p..a}yh...yi.
01E0: 08 00 60 7D 60 61 60 7D 60 0C 00 00 00 10 60 70 // ..`}`a`}`.....`p
01F0: 60 4D 45 44 30 70 4D 45 44 34 6B 14 21 5F 50 50 // `MED0pMED4k.!_PP
0200: 43 00 70 0D 63 70 75 64 70 74 66 3A 20 5F 50 50 // C.p.cpudptf: _PP
0210: 43 20 43 61 6C 6C 65 64 00 5B 31 A4 00 14 47 06 // C Called.[1...G.
0220: 53 50 50 43 09 70 0D 63 70 75 64 70 74 66 3A 20 // SPPC.p.cpudptf:
0230: 53 50 50 43 20 43 61 6C 6C 65 64 00 5B 31 70 68 // SPPC Called.[1ph
0240: 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 50 50 43 86 // \/._PR_CPU0_PPC.
0250: 5C 2E 5F 50 52 5F 43 50 55 30 0A 80 86 5C 2E 5F // \._PR_CPU0...\._
0260: 50 52 5F 43 50 55 31 0A 80 86 5C 2E 5F 50 52 5F // PR_CPU1...\._PR_
0270: 43 50 55 32 0A 80 86 5C 2E 5F 50 52 5F 43 50 55 // CPU2...\._PR_CPU
0280: 33 0A 80 A4 00 08 50 55 52 45 01 14 38 53 50 55 // 3.....PURE..8SPU
0290: 52 09 08 5F 44 45 50 12 0C 01 5C 2E 5F 53 42 5F // R.._DEP...\._SB_
02A0: 50 41 47 44 70 68 5C 2F 03 5F 53 42 5F 50 41 47 // PAGDph\/._SB_PAG
02B0: 44 49 44 43 4E 86 5C 2E 5F 53 42 5F 50 41 47 44 // DIDCN.\._SB_PAGD
02C0: 0A 80 A4 00 14 0C 5F 44 54 49 01 70 68 4C 53 54 // ......_DTI.phLST
02D0: 4D 14 0A 5F 4E 54 54 00 A4 0B DE 0A 14 40 06 5F // M.._NTT......@._
02E0: 50 53 53 00 70 0D 63 70 75 64 70 74 66 3A 20 5F // PSS.p.cpudptf: _
02F0: 50 53 53 20 43 61 6C 6C 65 64 00 5B 31 A0 23 5B // PSS Called.[1.#[
0300: 12 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 50 53 53 // .\/._PR_CPU0_PSS
0310: 60 A4 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 50 53 // `.\/._PR_CPU0_PS
0320: 53 A1 0E A4 12 0B 01 12 08 06 00 00 00 00 00 00 // S...............
0330: A4 12 0B 01 12 08 06 00 00 00 00 00 00 14 4E 05 // ..............N.
0340: 5F 54 53 53 00 70 0D 63 70 75 64 70 74 66 3A 20 // _TSS.p.cpudptf:
0350: 5F 54 53 53 20 43 61 6C 6C 65 64 00 5B 31 A0 23 // _TSS Called.[1.#
0360: 5B 12 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 54 53 // [.\/._PR_CPU0_TS
0370: 53 60 A4 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 54 // S`.\/._PR_CPU0_T
0380: 53 53 A1 0D A4 12 0A 01 12 07 05 00 00 00 00 00 // SS..............
0390: A4 12 0A 01 12 07 05 00 00 00 00 00 14 4A 04 5F // .............J._
03A0: 54 50 43 00 70 0D 63 70 75 64 70 74 66 3A 20 5F // TPC.p.cpudptf: _
03B0: 54 50 43 20 43 61 6C 6C 65 64 00 5B 31 A0 23 5B // TPC Called.[1.#[
03C0: 12 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 54 50 43 // .\/._PR_CPU0_TPC
03D0: 60 A4 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 54 50 // `.\/._PR_CPU0_TP
03E0: 43 A1 03 A4 00 A4 00 14 42 0A 5F 50 54 43 00 70 // C.......B._PTC.p
03F0: 0D 63 70 75 64 70 74 66 3A 20 5F 50 54 43 20 43 // .cpudptf: _PTC C
0400: 61 6C 6C 65 64 00 5B 31 A0 23 5B 12 5C 2F 03 5F // alled.[1.#[.\/._
0410: 50 52 5F 43 50 55 30 5F 50 54 43 60 A4 5C 2F 03 // PR_CPU0_PTC`.\/.
0420: 5F 50 52 5F 43 50 55 30 5F 50 54 43 A1 2F A4 12 // _PR_CPU0_PTC./..
0430: 2C 02 11 14 0A 11 82 0C 00 7F 00 00 00 00 00 00 // ,...............
0440: 00 00 00 00 00 79 00 11 14 0A 11 82 0C 00 7F 00 // .....y..........
0450: 00 00 00 00 00 00 00 00 00 00 79 00 A4 12 2C 02 // ..........y...,.
0460: 11 14 0A 11 82 0C 00 7F 00 00 00 00 00 00 00 00 // ................
0470: 00 00 00 79 00 11 14 0A 11 82 0C 00 7F 00 00 00 // ...y............
0480: 00 00 00 00 00 00 00 00 79 00 14 40 06 5F 54 53 // ........y..@._TS
0490: 44 00 70 0D 63 70 75 64 70 74 66 3A 20 5F 54 53 // D.p.cpudptf: _TS
04A0: 44 20 43 61 6C 6C 65 64 00 5B 31 A0 23 5B 12 5C // D Called.[1.#[.\
04B0: 2F 03 5F 50 52 5F 43 50 55 30 5F 54 53 44 60 A4 // /._PR_CPU0_TSD`.
04C0: 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 54 53 44 A1 // \/._PR_CPU0_TSD.
04D0: 0E A4 12 0B 01 12 08 05 0A 05 00 00 00 00 A4 12 // ................
04E0: 0B 01 12 08 05 0A 05 00 00 00 00 14 4A 04 5F 54 // ............J._T
04F0: 44 4C 00 70 0D 63 70 75 64 70 74 66 3A 20 5F 54 // DL.p.cpudptf: _T
0500: 44 4C 20 43 61 6C 6C 65 64 00 5B 31 A0 23 5B 12 // DL Called.[1.#[.
0510: 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 54 44 4C 60 // \/._PR_CPU0_TDL`
0520: A4 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 54 44 4C // .\/._PR_CPU0_TDL
0530: A1 03 A4 00 A4 00 14 4F 05 5F 50 44 4C 00 70 0D // .......O._PDL.p.
0540: 63 70 75 64 70 74 66 3A 20 5F 50 44 4C 20 43 61 // cpudptf: _PDL Ca
0550: 6C 6C 65 64 00 5B 31 A0 38 5B 12 5C 2F 03 5F 50 // lled.[1.8[.\/._P
0560: 52 5F 43 50 55 30 5F 50 53 53 60 08 4C 46 4D 49 // R_CPU0_PSS`.LFMI
0570: 00 70 87 5C 2F 03 5F 50 52 5F 43 50 55 30 5F 50 // .p.\/._PR_CPU0_P
0580: 53 53 4C 46 4D 49 76 4C 46 4D 49 A4 4C 46 4D 49 // SSLFMIvLFMI.LFMI
0590: A1 03 A4 00 A4 00 14 4D 08 5F 50 53 56 08 A0 44 // .......M._PSV..D
05A0: 04 91 93 42 44 49 44 0A 08 93 42 44 49 44 0A 0A // ...BDID...BDID..
05B0: A0 32 93 5C 2F 05 5F 53 42 5F 50 43 49 30 49 32 // .2.\/._SB_PCI0I2
05C0: 43 37 50 4D 49 35 53 52 43 44 00 A4 5C 2F 03 5F // C7PMI5SRCD..\/._
05D0: 53 42 5F 44 50 54 46 43 54 4F 4B 74 41 43 54 54 // SB_DPTFCTOKtACTT
05E0: 0A 05 00 A1 2C A0 2A 93 5C 2F 03 5F 53 42 5F 41 // ....,.*.\/._SB_A
05F0: 44 50 31 5F 50 53 52 00 A4 5C 2F 03 5F 53 42 5F // DP1_PSR..\/._SB_
0600: 44 50 54 46 43 54 4F 4B 74 41 43 54 54 0A 05 00 // DPTFCTOKtACTT...
0610: A4 5C 2F 03 5F 53 42 5F 44 50 54 46 43 54 4F 4B // .\/._SB_DPTFCTOK
0620: 41 43 54 54 14 1C 5F 53 43 50 0B A0 15 91 93 68 // ACTT.._SCP.....h
0630: 00 93 68 01 70 68 43 54 59 50 86 50 4E 49 54 0A // ..h.phCTYP.PNIT.
0640: 91 08 47 54 53 48 0A 14 14 0B 53 44 42 47 00 A4 // ..GTSH....SDBG..
0650: 50 44 42 47 // PDBG
*/