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[linux-dvb] DVB-S w/ Budget upgrade patch
HI
Here is my latest and greatest patch for Roberto's
patch for DVB-S.
Looking cloesly what's going on, I found out that in
his original patch there was incorrect PCI bus burst
arbitration setting that caused artefact in xawtv,
It is corrected now. The patch is for convergence DVB
cvs tree.
Emard
Only in DVB/apps/av7110_loadkeys: evtest
diff -pur /home/loader/src/DVB/apps/szap/szap.c DVB/apps/szap/szap.c
--- /home/loader/src/DVB/apps/szap/szap.c Sun Nov 17 00:36:09 2002
+++ DVB/apps/szap/szap.c Sat Jan 4 21:07:11 2003
@@ -193,8 +193,10 @@ int check_frontend (int fe_fd, int dvr)
fe_status_t status;
uint16_t snr, signal;
uint32_t ber, uncorrected_blocks;
+ int i;
- do {
+ for(i = 0; i < 20 || dvr > 0; i++)
+ {
ioctl(fe_fd, FE_READ_STATUS, &status);
ioctl(fe_fd, FE_READ_SIGNAL_STRENGTH, &signal);
ioctl(fe_fd, FE_READ_SNR, &snr);
@@ -208,8 +210,11 @@ int check_frontend (int fe_fd, int dvr)
printf("FE_HAS_LOCK");
printf("\n");
+ if(dvr <= 0 && i > 0 && ber == 0)
+ return 1; /* successful tuning */
+
usleep(1000000);
- } while (1);
+ }
return 0;
}
diff -pur /home/loader/src/DVB/driver/Makefile DVB/driver/Makefile
--- /home/loader/src/DVB/driver/Makefile Mon Dec 9 23:51:40 2002
+++ DVB/driver/Makefile Sat Jan 4 21:07:11 2003
@@ -93,7 +93,7 @@ dvb-core-objs = dmxdev.o dvb_demux.o dvb
subdir-y := frontends $(CARDS)
mod-subdirs := frontends $(CARDS)
-EXTRA_CFLAGS = -I ../include -I . -g -MD
+EXTRA_CFLAGS = -I ../include -I . -MD
dvb-core.o: $(dvb-core-objs)
$(LD) -r -o $@ $(dvb-core-objs)
diff -pur /home/loader/src/DVB/driver/av7110/Makefile DVB/driver/av7110/Makefile
--- /home/loader/src/DVB/driver/av7110/Makefile Sun Nov 17 00:36:24 2002
+++ DVB/driver/av7110/Makefile Sat Jan 4 21:07:11 2003
@@ -14,7 +14,7 @@ dvb-ttpci.o: $(dvb-ttpci-objs)
$(LD) -r -o $@ $(dvb-ttpci-objs)
-EXTRA_CFLAGS = -I.. -I. -g -DCONFIG_DVB_AV7110_OSD -MD
+EXTRA_CFLAGS = -I.. -I. -DCONFIG_DVB_AV7110_OSD -MD
ifdef DVB_PACK
@@ -70,7 +70,7 @@ clean:
insmod:
insmod input; \
insmod evdev; \
- insmod dvb-ttpci.o;
+ insmod dvb-ttpci.o patch=1;
rmmod:
rmmod dvb-ttpci; \
diff -pur /home/loader/src/DVB/driver/av7110/av7110.c DVB/driver/av7110/av7110.c
--- /home/loader/src/DVB/driver/av7110/av7110.c Mon Dec 30 15:48:57 2002
+++ DVB/driver/av7110/av7110.c Sat Jan 4 21:10:04 2003
@@ -101,6 +101,7 @@ static int av7110_debug = 0;
static int vidmode=CVBS_RGB_OUT;
static int pids_off;
static int adac=DVB_ADAC_TI;
+static u32 patch=0;
#define saacomm(x,y) av7110->saa->command(av7110->saa->i2c_bus, (x), (y))
@@ -684,10 +685,18 @@ TTBStop(av7110_t *av7110)
{
if (--av7110->feeding)
return av7110->feeding;
- saa7146_write(av7110->saa_mem, MC1, MASK_20); // DMA3 off
+/*
+** In the following comments, the notation "(rHH pNN)" refers the usage of the
+** SAA7146 register "HH", described in the datasheet page "NN".
+*/
+ saa7146_write(av7110->saa_mem, MC1, MASK_20); // DMA3 off (rFC p33)
saa7146_write(av7110->saa_mem, MC1, MASK_28); // RPS0 off
+/* The RPS1 can be left running (DMA_fetch: ~300 words/sec) */
+ saa7146_write(av7110->saa_mem, MC1, MASK_29); // RPS1 off
+ // Disable Video_address_Protection_Error interrupt (rDC p50)
saa7146_write(av7110->saa_mem, IER,
saa7146_read(av7110->saa_mem, IER) & ~MASK_10 );
+ // Disable Field ID port B interrupt
saa7146_write(av7110->saa_mem, IER,
saa7146_read(av7110->saa_mem, IER)& ~MASK_07);
return 0;
@@ -699,41 +708,124 @@ static int
TTBStart(av7110_t *av7110)
{
struct saa7146 *saa=av7110->saa;
+ int cnt = 0; //RDA
//printk ("function : %s\n", __FUNCTION__);
if (av7110->feeding)
return ++av7110->feeding;
- saa7146_write(saa->mem, MC1, MASK_20); // DMA3 off
+ saa7146_write(saa->mem, MC1, MASK_20); // DMA3 off (rFC p33)
memset(saa->grabbing, 0x00, TS_HEIGHT*TS_WIDTH);
- saa7146_write(saa->mem, PCI_BT_V1, 0x001c0000);
-
+ if(av7110->saa->card_type != DVB_CARD_TT_SIEMENS)
+ {
+ // Burst3: 128 Dwords (r48 p31)
+ // Thresh3: 4 empty Dwords
+ saa7146_write(saa->mem, PCI_BT_V1, 0x001c0000);
+ }
+ else
+ {
+ if(patch & DVB_TTP_TS_PATCH)
+ // Burst3: 128 Dwords (r48 p31)
+ // Thresh3: 4 empty Dwords
+ // leave rest of the bits untouched
+ saa7146_write(saa->mem, PCI_BT_V1, 0x001c0000 |
+ (saa7146_read(saa->mem, PCI_BT_V1) & ~0x001f0000));
+ }
+
av7110->tsf=0;
av7110->ttbp=0;
+ // LLC_A: Set to input (r50 p84)
+ // SIO_A: HS_A and VS_A are input
+ // SYNC_A: Ha at rising edge of HS; Va at rising edge of VS
+ // Fa=HS*VS-falling, forced toggle
+ // FIDESA: No interrupt condition
+ // LLC_B: Set to input
+ // SIO_B: HS_B and VS_B are input
+ // SYNC_B: Hb at rising edge of HS; Vb at rising & falling edge of Frame Sync at
+ // the VS pin; Fb=direct FS
+ // FIDESB: Falling edge is interrupt condition
saa7146_write(saa->mem, DD1_INIT, 0x02000680);
+ // UPLD_D1_A: Upload 'Video DATA stream handling at port D1_A' (r100 p34)
+ // UPLD_D1_B: Upload 'Video DATA stream handling at port D1_B'
saa7146_write(saa->mem, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
+ // BRSdatasel: Video stream from D1_B (r58 p87)
saa7146_write(saa->mem, BRS_CTRL, 0x60000000);
- saa7146_write(saa->mem, MC2, (MASK_08 | MASK_24));
+ // UPLD_BRS: Upload 'BRS Control Register' (r100 p34)
+ saa7146_write(saa->mem, MC2, (MASK_08 | MASK_24));
mdelay(10);
+ // Base addr for Odd fields (r30 p23)
saa7146_write(saa->mem, BASE_ODD3, 0);
+ // Base addr for Even fields (r34 p23)
saa7146_write(saa->mem, BASE_EVEN3, TS_WIDTH*TS_HEIGHT/2);
+ // Set Protection addr (don't write after this position) (r38 p23)
saa7146_write(saa->mem, PROT_ADDR3, TS_WIDTH*TS_HEIGHT);
+ // Base addr of the Page table for DMA transfers (r40 p23)
+ // Enable MMU (ME1)
+ // Continuous mode; Interrupt limit 2^16 bytes (0xB)
+ // At Interrupt limit, restart at base addr; FIFO write PCI; No endian swap
saa7146_write(saa->mem, BASE_PAGE3, virt_to_bus(saa->page_table[0])|ME1|0xb0);
+ // Store the TS packets without gaps (r3C p23)
saa7146_write(saa->mem, PITCH3, TS_WIDTH);
+ // Number of lines per field*2^16 + Number of bytes per line (r44 p23)
saa7146_write(saa->mem, NUM_LINE_BYTE3, ((TS_HEIGHT/2)<<16)|TS_WIDTH);
- saa7146_write(saa->mem, MC2, (MASK_04 | MASK_20));
+ // Upload 'Video DMA3 registers' (r100 p34)
+ saa7146_write(saa->mem, MC2, (MASK_04 | MASK_20));
+
+ if (patch & DVB_TTP_TS_PATCH) { //RDA
+ //printk("dvb: TTP_TS_PATCH code\n");
+/*
+** This code will setup the SAA7146_RPS1 to generate a square wave on GPIO3,
+** changing when a field (TS_HEIGHT/2 "lines" of TS_WIDTH packets) has been
+** adquired on SAA7146_D1B video port; then, this GPIO3 output which is
+** connected to the D1B_VSYNC input, will trigger the adquisition of the
+** alternate field and so on.
+** Currently, the TT_budget / WinTV_Nova cards have two ICs (74HCT4040, LVC74)
+** for the generation of this VSYNC signal, which seems that can be done
+** perfectly without its :-)).
+*/ // Setup RPS1 "program" (p35)
+ // Wait Source Line Counter Threshold (p36)
+ saa->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | EVT_HS);
+ // Set GPIO3=1 (p42)
+ saa->rps1[cnt++]=cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
+ saa->rps1[cnt++]=cpu_to_le32(GPIO3_MSK);
+ saa->rps1[cnt++]=cpu_to_le32(GPIO_OUTHI<<24);
+ // Wait reset Source Line Counter Threshold (p36)
+ saa->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS);
+ // Wait Source Line Counter Threshold
+ saa->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | EVT_HS);
+ // Set GPIO3=0 (p42)
+ saa->rps1[cnt++]=cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
+ saa->rps1[cnt++]=cpu_to_le32(GPIO3_MSK);
+ saa->rps1[cnt++]=cpu_to_le32(GPIO_OUTLO<<24);
+ // Wait reset Source Line Counter Threshold (p36)
+ saa->rps1[cnt++]=cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS);
+ // Jump to begin of RPS program (p37)
+ saa->rps1[cnt++]=cpu_to_le32(CMD_JUMP);
+ saa->rps1[cnt++]=cpu_to_le32(virt_to_bus(&saa->rps1[0]));
+
+ // Fix VSYNC level
+ setgpio(av7110, VSYNC_LINE, GPIO_OUTLO);
+ // Set RPS1 Address register to point RPS code (r108 p42)
+ saa7146_write(saa->mem, RPS_ADDR1, virt_to_bus(&saa->rps1[0]));
+ // Set Source Line Counter Threshold, using BRS (rCC p43)
+ saa7146_write(saa->mem, RPS_THRESH1, ((TS_HEIGHT/2) | MASK_12));
+ // Enable RPS1 (rFC p33)
+ saa7146_write(saa->mem, MC1, (MASK_13 | MASK_29));
+ }
// VPE
+ // Enable Video_address_Protection_Error interrupt (rDC p50)
saa7146_write(saa->mem, IER, saa7146_read(saa->mem, IER)|MASK_10);
- saa7146_write(saa->mem, MC1, (MASK_04 | MASK_20)); // DMA3 on
+ saa7146_write(saa->mem, MC1, (MASK_04 | MASK_20)); // DMA3 on (rFC p33)
// FIDB
+ // Enable Field ID port B interrupt (rDC p50)
saa7146_write(saa->mem, IER, saa7146_read(saa->mem, IER)|MASK_07);
return ++av7110->feeding;
@@ -891,6 +983,7 @@ static void fidbirq(struct saa7146* saa,
av7110_t *av7110=(av7110_t *) data;
u8 *mem;
+ // addr of frame buffer just adquired
mem=(av7110->tsf ? TS_HEIGHT*TS_WIDTH/2 :0)+(u8 *)av7110->saa->grabbing;
// FIXME: think of something better without busy waiting
@@ -900,13 +993,25 @@ static void fidbirq(struct saa7146* saa,
while (saa7146_read(av7110->saa_mem, PCI_VDP3)<0x17800);
av7110->tsf^=1;
+ // LLC_A: Set to input (r50 p84)
+ // SIO_A: HS_A and VS_A are input
+ // SYNC_A: Ha at rising edge of HS; Va at rising edge of VS
+ // Fa=HS*VS-falling, forced toggle
+ // FIDESA: No interrupt condition
+ // LLC_B: Set to input
+ // SIO_B: HS_B and VS_B are input
+ // SYNC_B: Hb at rising edge of HS; Vb at rising & falling edge of Frame Sync
+ // at VS pin; Fb=direct FS
+ // FIDESB: Interrupt condition at Rising/Falling, depending on 'dvb->tsf'
saa7146_write(av7110->saa_mem, DD1_INIT, 0x02000600|(av7110->tsf ? 0x40:0x80));
+ // UPLD_D1_A: Upload 'Video DATA stream handling at port D1_A' (r100 p34)
+ // UPLD_D1_B: Upload 'Video DATA stream handling at port D1_B'
saa7146_write(av7110->saa_mem, MC2,
(MASK_09 | MASK_25 | MASK_10 | MASK_26));
// FIXME: use bottom half or tasklet
if (av7110->feeding && mem[0]==0x47)
- dvb_dmx_swfilter_packets(&av7110->demux, mem, 512);
+ dvb_dmx_swfilter_packets(&av7110->demux, mem, TS_HEIGHT*TS_WIDTH/188/2); //RDA
}
#else
static
@@ -1331,6 +1436,7 @@ void gpioirq (unsigned long data)
} /* yes, fall through */
case DATA_TS_RECORD:
case DATA_PES_RECORD:
+ wait_for_debi_done(av7110);
saa7146_write(av7110->saa_mem, IER,
saa7146_read(av7110->saa_mem, IER) | MASK_19);
irdebi(av7110, DEBISWAB, DPRAM_BASE+rxbuf, 0, len);
@@ -1342,6 +1448,7 @@ void gpioirq (unsigned long data)
iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
break;
}
+ wait_for_debi_done(av7110);
saa7146_write(av7110->saa_mem, IER,
saa7146_read(av7110->saa_mem, IER) | MASK_19);
irdebi(av7110, DEBISWAB, Reserved, 0, len);
@@ -3482,6 +3589,9 @@ dvb_start_feed(struct dvb_demux_feed *dv
if (av7110->saa->card_type>=DVB_CARD_TT_BUDGET)
return TTBStart(av7110);
+ if (patch & DVB_TTP_TS_PATCH) //RDA
+ TTBStart(av7110);
+
if (dvbdmxfeed->pid>0x1fff)
return -1;
@@ -3539,6 +3649,9 @@ dvb_stop_feed(struct dvb_demux_feed *dvb
if (av7110->saa->card_type>=DVB_CARD_TT_BUDGET)
return TTBStop(av7110);
+ if (patch & DVB_TTP_TS_PATCH) //RDA
+ TTBStop(av7110);
+
if (dvbdmxfeed->type == DMX_TYPE_TS) {
if (dvbdmxfeed->ts_type & TS_DECODER) {
if (dvbdmxfeed->pes_type>=DMX_TS_PES_OTHER ||
@@ -4471,11 +4584,16 @@ dvb_register(av7110_t *av7110)
dvbdemux->priv=(void *) av7110;
if (av7110->saa->card_type==DVB_CARD_TT_SIEMENS) {
- for (i=0; i<32; i++)
- av7110->handle2filter[i]=NULL;
+ if (patch & DVB_TTP_TS_PATCH) {
+ dvbdemux->filternum=256;
+ dvbdemux->feednum=256;
+ } else {
+ for (i=0; i<32; i++)
+ av7110->handle2filter[i]=NULL;
- dvbdemux->filternum=32;
- dvbdemux->feednum=32;
+ dvbdemux->filternum=32;
+ dvbdemux->feednum=32;
+ }
dvbdemux->start_feed=dvb_start_feed;
dvbdemux->stop_feed=dvb_stop_feed;
dvbdemux->write_to_decoder=dvb_write_to_decoder;
@@ -4495,7 +4613,7 @@ dvb_register(av7110_t *av7110)
dvbfront->model="DVB Frontend";
dvbfront->source=DMX_FRONTEND_0;
- av7110->dmxdev.filternum=32;
+ av7110->dmxdev.filternum = ((patch & DVB_TTP_TS_PATCH) ? 256 : 32); //RDA
av7110->dmxdev.demux=&dvbdemux->dmx;
av7110->dmxdev.capabilities=0;
@@ -4700,10 +4818,25 @@ int av7110_attach (struct saa7146 *saa,
}
kernel_thread(arm_thread, (void *) av7110, 0);
} else {
+ setgpio(av7110, 2, GPIO_OUTHI); /* frontend power on */
+ }
+ if (av7110->saa->card_type!=DVB_CARD_TT_SIEMENS || (patch & DVB_TTP_TS_PATCH)!=0 ) {
+ //RDA
+ // LLC_A: Set to input (r50 p84)
+ // SIO_A: HS_A and VS_A are input
+ // SYNC_A: Ha at rising edge of HS; Va at rising edge of VS
+ // Fa=HS*VS-falling, forced toggle
+ // FIDESA: No interrupt condition
+ // LLC_B: Set to input
+ // SIO_B: HS_B and VS_B are input
+ // SYNC_B: Hb at rising edge of HS; Vb at rising & falling edge
+ // of Frame Sync at VS pin; Fb=direct FS
+ // FIDESB: No interrupt condition
saa7146_write(av7110->saa_mem, DD1_INIT, 0x02000600);
+ // UPLD_D1_A: Upload 'Video DATA stream handling port D1_A' (r100 p34)
+ // UPLD_D1_B: Upload 'Video DATA stream handling port D1_B'
saa7146_write(av7110->saa_mem, MC2,
(MASK_09 | MASK_25 | MASK_10 | MASK_26));
- setgpio(av7110, 2, GPIO_OUTHI); /* frontend power on */
}
SetVolume(av7110, 0xff, 0xff);
@@ -4883,6 +5016,7 @@ MODULE_PARM(vidlow,"l");
MODULE_PARM(vidmode,"i");
MODULE_PARM(pids_off,"i");
MODULE_PARM(adac,"i");
+MODULE_PARM(patch,"i");
/*
* Local variables:
diff -pur /home/loader/src/DVB/driver/av7110/av7110.h DVB/driver/av7110/av7110.h
--- /home/loader/src/DVB/driver/av7110/av7110.h Sun Nov 17 00:37:03 2002
+++ DVB/driver/av7110/av7110.h Sat Jan 4 21:07:11 2003
@@ -704,12 +704,15 @@ typedef struct av7110_s {
#define DRAM_START_CODE 0x2e000404
#define DRAM_MAX_CODE_SIZE 0x00100000
+// GPIO lines
+#define VSYNC_LINE 3 // regen VSYNC for TS capture (patch #1)
#define RESET_LINE 2
#define DEBI_DONE_LINE 1
#define ARM_IRQ_LINE 0
#define DAC_CS 0x8000
#define DAC_CDS 0x0000
+#define DVB_TTP_TS_PATCH 1 // Allow to get full TS on Premium cards
extern unsigned char *av7110_dpram_addr, *av7110_root_addr;
diff -pur /home/loader/src/DVB/driver/av7110/saa7146_core.c DVB/driver/av7110/saa7146_core.c
--- /home/loader/src/DVB/driver/av7110/saa7146_core.c Tue Nov 26 22:00:04 2002
+++ DVB/driver/av7110/saa7146_core.c Sat Jan 4 21:07:11 2003
@@ -418,12 +418,14 @@ static void saa7146_irq(int irq, void *d
/* read out the primary status register */
isr = saa7146_read(saa->mem, ISR);
- /* clear all IRQs */
- saa7146_write(saa->mem, ISR, isr);
/* is anything to do? */
if ( 0 == isr )
+ {
+ /* clear all IRQs */
+ saa7146_write(saa->mem, ISR, isr);
return;
+ }
dprintk("%s: irq-call: isr:0x%08x\n",saa->name,isr);
@@ -434,6 +436,8 @@ static void saa7146_irq(int irq, void *d
saa7146_ext[i]->irq_handler(saa, isr, saa->data[i]);
//saa7146_write(saa->mem, ISR, saa7146_ext[i]->handles_irqs);
}
+ /* clear all IRQs */
+ saa7146_write(saa->mem, ISR, isr);
//printk(KERN_ERR "%s: unhandled interrupt: 0x%08x\n", saa->name, isr);
diff -pur /home/loader/src/DVB/driver/av7110/saa7146_defs.h DVB/driver/av7110/saa7146_defs.h
--- /home/loader/src/DVB/driver/av7110/saa7146_defs.h Sun Nov 17 00:37:03 2002
+++ DVB/driver/av7110/saa7146_defs.h Sat Jan 4 21:07:11 2003
@@ -121,6 +121,10 @@ struct saa7146_mmap_struct
#define CMD_WR_REG 0x90000000 /* Write (load) register */
#define CMD_RD_REG 0xa0000000 /* Read (store) register */
#define CMD_WR_REG_MASK 0xc0000000 /* Write register with mask */
+// Some Events and Command modifiers
+#define EVT_HS (1<<15) // Source Line Threshold rearched
+#define RPS_OAN (1<<27) // 1: OR events, 0: AND events
+#define RPS_INV (1<<26) // Invert (compound) event
/************************************************************************/
/* OUTPUT FORMATS */
@@ -276,6 +280,10 @@ struct saa7146_mmap_struct
#define IER 0xDC /* Interrupt enable register */
#define GPIO_CTRL 0xE0 /* GPIO 0-3 register */
+#define GPIO0_MSK 0x000000FF // GPIO #0 control bits
+#define GPIO1_MSK 0x0000FF00 // GPIO #1 control bits
+#define GPIO2_MSK 0x00FF0000 // GPIO #2 control bits
+#define GPIO3_MSK 0xFF000000 // GPIO #3 control bits
#define EC1SSR 0xE4 /* Event cnt set 1 source select */
#define EC2SSR 0xE8 /* Event cnt set 2 source select */
Only in DVB/libdvb: conv
Only in DVB/libdvb: merge_dvb
Only in DVB/libdvb: newtest
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