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[vdr] Re: Increasing SDRAM on DVB cards




Hello all,

Klaus Schmidinger schrieb:
Hermann Gausterer wrote:
  
The card has 2MB of DRAM (which is relatively slow) and 2MB of (fast)
SDRAM. The SDRAM is the one used for video decoding (buffer) and OSD.
      
what are the adress ranges the two consume in the "virtual" rammap
of the DSP? are the close to another?
(i think you have access to the firmware-source, and know this, klaus *sfg*)
    

Take a look at page 13 of the AV7110 data sheet, which shows its
memory map. The SDRAM is at CC000000-CDFFFFFF, while the DRAM is
at 2E000000-2FFFFFFF.

  
the reason for my question:
i think the easiest way for doing this what you want to do is,
replace the chip with an pincompable type with more capacity

accourding to the docs, brought to us by Stefaan Coddé (thank you !!)
the dram chip has 11 adress lines
and they are used in the form:

A 0 - A 10
R o w   A d d r e s s   :   R A 0   ~   R A 1 0 ,   C o l u m n   A d d r e
s s   :   C A 0   ~   C A 7
A u t o - p r e c h a r g e   f l a g   :   A 1 0

but the CHIP (the DIL housing) has allready forseen an A 11

for this layout, it is clear that A0 - A10 MUST be allready wired to the DSP
and if we/you get an replacing part, simple look for an which can do
on bit more on the COLUMN mode and you have your 4mb
but the datacheat say on page 19:
The SDRAM must be 16-bits wide. The ‘AV7110 provides control signals for up to two SDRAMs.
Any combination of 4 or 16 Mbit SDRAMs may be used, provided they total at least 16 Mbits. Other
supported sizes and configurations are:
16 Mbit → one 16 Mbit SDRAM
20 Mbit → one 16 Mbit and one 4 Mbit SDRAM
32 Mbit → two 16 Mbit SDRAM

so you cound not use one big  sdram.

for this to work, the hardware adressdecoder for the two different
ram chips have to be a GAP between DRAM and SRAM

this layout is only guesed, for explanation only !!!!!

0FFF:FFFF----------------------(x+2 mb)
###########    SRAM   #########
0FE0:0000----------------------(x mb)

003F:FFFF----------------------(4 mb)
#######  DRAM FUTURE !!! ######
001F:FFFF----------------------(2 mb)
###########    DRAM   #########
0000:0000----------------------(0 mb)

with this no change to the hardware decoder would be needed
but only somebody with knowledge of the firmewareinternals
can answer and help here !
on Page 19:
The two chip selects correspond to the following address ranges:
SCS1 → 0xCC00 0000 - 0xCC1F FFFF
SCS2 → 0xCC20 0000 - 0xCDFF FFFF
so each has a range of 2Mbyte

    

Well, since SDRAM goes from CC000000-CDFFFFFF and only half of that
address space is currently used, your suggestion might work _if_
there are actually enough address lines connected. However, since the
AV7110 has two explicit SCS lines (SCS1 and SCS2) I would assume that
it can handle either one or two 2MB chips, each connected to its very
own SCSn line.
seen above

But I'm just guessing here... Maybe you're actually on the right track.
But then again, what would the SCS2 pin be for?

Klaus
hope this help.
MfG
Martin
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